High-speed electrooptical VOA integrated in silicon-on-insulator

In this paper, we present simulation results of an electrooptical variable optical attenuator (VOA) inte-grated in silicon-on-insulator waveguide. The device is functionally based on free carriers absorption toachieve attenuation. Beam propagation method (BPM) and two-dimensional semiconductor device simu-lation tool PISCES-Ⅱ were used to analyze the dc and transient characteristics of the device. The devicehas a response time (including rise time and fall time) less than 200 ns, much faster than the thermoopticand micro-electromechanical systems (MEMSs) based VOAs.

Integrated MMI Optical Couplers and Optical Switches in Silicon-on-Insulator Technology

Integrated multimode interference (MMI) coupler based on silicon-on-insulator(SOI) has been becoming a kind of more and more attractive device in optical systems. SiO2thin cladding layers (＜1.0 μm) can be usedin SOI waveguide due to the large index step be-tween Si and SiO2, making them compatible with VLSI technology. The design and fabrica-tion of MMI optical couplers and optical switches in SOI technology are presented in thepa-per. We demonstrated the switching time of 2 × 2 MMI-MZI thermo-optical switch is less than 20 μs:

Design and Fabrication of Ultracompact 3-dB MMI Coupler in Silicon-on-Insulator

An ultracompact 3-dB coupler is designed and fabricated in silicon-on-insulator,based on 12 line tapered multimode interference(MMI) coupler.Comparing with the conventional straigth MMI coupler,the device is-40% shorter in length.The device exhibits uniformity of 1.3dB and excess loss of 2.5dB

2 x 2 electrooptical switch in silicon-on-insulator waveguide

A 2 x 2 Mach-Zehnder interferometer electrooptical switch integrated in silicon-on-insulator using multimode interference 3-dB couplers as splitter and combiner has been proposed and fabricated. Free carriers plasma dispersion effect was utilized to realize light modulation in silicon. Switching operation was achieved at an injection current of 358mA and which can be much reduced by optimizing the PIN structure and improving fabrication process. Extinction ratio of 7.7dB and crosstalk of 4.8dB has been observed.

Integrated tapered MMI couplers in the silicon-on-insulator technology

The authors have designed and fabricated 2x2 parabolically tapered MMI coupler with large cross-section and large space between difference ports using Silicon-on-Insulator ( SOI) technology. The devices demonstrate a minimum uniformity of 0.8dB and 30% shorter than the straight MMI coupler.

Integrated MMI optical couplers and optical switches in Silicon-on-insulator technology

Integrated multimode interference coupler based on silicon-on-insulator has been become a kind of more and more attractive device in optical systems. Thin cladding layers (<1.0mum) can be used in SOI waveguide due to the large index step between Si and SiO2, making them compatible with the VLSI technology. Here we demonstrate the design and fabrication of multimode interference (MMI) optical couplers and optical switches in SOI technology.

Integrated multimode interference couplers in silicon-on insulator

Silicon-on insulator (SOI) is an attractive platform for the fabrication of optoelectronic integrated circuit. Thin cladding layers (< 1.0m) can be used in SOI waveguide due to the large index step between Si and SiO2, making them compatible with the VLSI technology. Here we demonstrate the fabrication of 1 x 4 and 2 x 2 multimode interference (MMI) coupler based on SOI technology. Performances of the devices are analyzed. The minimum excess loss of the devices is about 1.8dB. The devices show uniform power distribution.

Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

Influence of nitrogen implantation into the buried oxide on the radiation hardness of silicon-on-insulator wafers

摘要: In order to improve the total-dose radiation hardness of the buried oxide of separation by implanted oxygen silicon-on-insulator wafers, nitrogen ions were implanted into the buried oxide with a dose of 10(16)cm(-2), and subsequent annealing was performed at 1100 degrees C. The effect of annealing time on the radiation hardness of the nitrogen implanted wafers has been studied by the high frequency capacitance-voltage technique. The results suggest that the improvement of the radiation hardness of the wafers can be achieved through a shorter time annealing after nitrogen implantation. The nitrogen-implanted sample with the shortest annealing time 0.5 h shows the highest tolerance to total-dose radiation. In particular, for the 1.0 and 1.5 h annealing samples, both total dose responses were unusual. After 300-krad(Si) irradiation, both the shifts of capacitance-voltage curve reached a maximum, respectively, and then decreased with increasing total dose. In addition, the wafers were analysed by the Fourier transform infrared spectroscopy technique, and some useful results have been obtained.

Study of He-induced nano-cavities as sinks of oxygen for forming silicon-on-insulator

In the present work, a Cz-Silicon wafer is implanted with helium ions to produce a buried porous layer, and then thermally annealed in a dry oxygen atmosphere to make oxygen transport into the cavities. The formation of the buried oxide layer in the case of internal oxidation (ITOX) of the buried porous layer of cavities in the silicon sample is studied by positron beam annihilation (PBA). The cavities are formed by 15 keV He implantation at a fluence of 2 x 10(16) cm(-2) and followed by thermal annealing at 673 K for 30 min in vacuum. The internal oxidation is carried out at temperatures ranging from 1073 to 1473 K for 2 h in a dry oxygen atmosphere. The layered structures evolved in the silicon are detected by using the PBA and the thicknesses of their layers and nature are also investigated. It is found that rather high temperatures must be chosen to establish a sufficient flux of oxygen into the cavity layer. On the other hand high temperatures lead to coarsening the cavities and removing the cavity layer finally.

Material effects on stress-induced defect generation in trenched silicon-on-insulator structures

We have investigated the influence of the material properties of the silicon device layer on the generation of defects, and in particular slip dislocations, in trenched and refilled fusion-bonded silicon-on-insulator structures. A strong dependence of the ease of slip generation on the type of dopant species was observed, with the samples falling into three basic categories; heavily boron-doped silicon showed ready slip generation, arsenic and antimony-doped material was fairly resistant to slip, while silicon moderately or lightly doped with phosphorous or boron gave intermediate behavior. The observed behavior appears to be controlled by differences in the dislocation generation mechanism rather than by dislocation mobility. The introduction of an implanted buried layer at the bonding interface was found to result in an increase in slip generation in the silicon, again with a variation according to the dopant species. Here, the greatest slip occurred for both boron and antimony-implanted samples. The weakening of the implanted material may be related to the presence of a band of precipitates observed in the silicon near the bonding interface. (C) 2001 The Electrochemical Society.