1000 resultados para InAs island


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We report a detailed analysis of optical properties of single submonolayer InAs structures grown on GaAs (001) matrix. It is shown that the formation of InAs dots with 1 monolayer (ML) height leads to localization of exciton under certain submonolayer InAs coverage, which play a key role in the highly improved luminescence efficiency of the submonolayer InAs/GaAs structures.

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Optical properties of single submonolayer InAs structures grown on GaAs (001) matrix are systematically investigated by means of photoluminescence acid time-resolved photoluminescence, It is shown that the formation of InAs dots with 1 ML height leads to localization of excitons under certain submonolayer InAs coverages, which play a key role in the highly improved luminescence efficiency of the submonolayer InAs/GaAs structures. (C) 1995 American Institute of Physics.

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We have measured low-temperature photoluminescence spectra of InAs quantum dots embedded in a GaAs crystalline matrix under hydrostatic pressures up to 7 GPa. Below 4.2 GPa the spectra are dominated by the Gamma-like electron-heavy hole (HH) exciton transition in the InAs dots. Above 4.2 GPa the spectra show two X-related luminescence bands which are attributed to the indirect type-I transition between X(Xy) and HH states of the dots and the type-II transition from X states in GaAs to InAs HH states, respectively. In the Gamma-X crossover regime we find evidence for a pronounced mixing interaction between InAs Gamma-like and GaAs X-like states. The corresponding interaction potential is estimated to be 9 meV.

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于2010-11-17批量导入

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在5 K下,采用光致发光光谱和时间分辨光谱研究了不同单量子点的精细结构和对应发光光谱的偏振性、单激子/双激子发光光谱和相应发光动力学.给出InAs单量子点发光光谱所对应能级的精细结构及激子本征态的偏振特性.当精细结构能级劈裂为零时, 激子的本征态为简并的圆偏振态.而当精细结构能级劈裂大于零时,一般在几十到几百μeV,激子的本征态为非简并的线偏振态.相对于单激子发光寿命,激子-激子间的散射使单激子的复合发光寿命减小.

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在有效质量近似下,利用微扰法研究了InAs量子环内类氢杂质基态及低激发态的能级分布.受限势采用抛物形势,在二维平面极坐标下,用薛定谔方程的精确解析解进行计算.数值计算结果显示,电子能级敏感地依赖于量子环半径,能级存在极小值,这是由于限制势采用抛物势的结果.如果减小环的半径,可以增加能级间距.第一激发态类氢杂质能级的简并没有消除,n≥2时简并的能级发生分裂并且间距随半径的增大而增大.电子能级间距还敏感地依赖于角频率并随角频率的增大而增大.第一激发态的简并没有消除,第二激发态的简并被部分地消除.在计算InAs量子环中类氢杂质的基态和低激发态的能级时,角频率改变的影响也是很深刻的.文章结果对研究量子环的光跃迁及光谱结构有重要指导意义.

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利用分子束外延制备了三种类型量子点样品,它们分别是:未掺杂样品、n型Si调制掺杂样品和p型Be调制掺杂样品.在5 K温度下,采用共聚焦显微镜系统,测量了单量子点的光致发光谱和时间分辨光谱, 研究了单量子点中三种类型激子(本征激子、负电荷激子和正电荷激子)的电子/空穴自旋翻转时间.它们的自旋翻转时间常数分别为: 本征激子的自旋翻转时间约16 ns, 正电荷激子中电子的自旋翻转时间约2 ns, 负电荷激子中空穴的自旋翻转时间约50 ps.

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采用分子束外延(MBE)技术,在GaSb(100)衬底上外延生长晶体结构完整和表面平整的Ⅱ型超晶格InAs(1.2 am)/GaSb(2.4 am).拉曼光谱表明:随着温度从70 K升高至室温,由于热膨胀作用和光声子散射过程中的衰减,超晶格纵光学声子拉曼频移向低波数方向移动5 cm~(-1),频移温度系数约为0.023 cm~(-1)/K.光致发光(PL)峰在2.4~2.8 μm,由带间辐射复合和束缚激子复合构成,2.55 μm PL峰随温度变化(15~150 K)发生微小红移,超晶格中InAs电子带与GaSb空穴带带间距随温度变化比体材料的禁带宽度小.PL发光强度在15~50 K随温度升高而升高,在60~150 K则相反,并在不同温度段表现出不同的温度依赖关系.

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对p型掺杂1.3 μm InAs/GaAs量子点激光器的最大模式增益进行了实验和理论分析.实验上,测量了不同腔长激光器阈值电流密度与总损耗的对应关系,拟合出的最大模式增益为17.5 cm~(-1),与相同结构非掺杂量子点激光器的最大模式增益一致.同时理论分析表明,p型掺杂对InAs/GaAs量子点激光器的最大模式增益并无影响,并且最大模式增益的计算结果与实验值相符.具有较小高度或高宽比的量子点能达到更高的最大模式增益,而较高的最大模式增益对p型掺杂1.3 μm InAs/GaAs自组织量子点激光器在光通信系统中的应用具有重要意义.

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采用分子束外延(MBE)方法,在(001)GaAs衬底上生长了短周期Ⅱ型超晶格(SLs):InAs/GaSb (2ML/8ML)和InAs/GaSb (8ML/8ML).从X射线衍射(HRXRD)中计算出超晶格周期分别为31.2(A)和57.3(A).室温红外透射光谱表明两种超晶格结构在短波2.1μm和中波5μm处有明显吸收.通过腐蚀、光刻和欧姆接触,制备了短波和中波的单元光导探测器.在室温和低温下进行光谱响应测试和黑体测试,77K下,50%截止波长分别为2.1μm和5.0μm,黑体探测率D~·_(bb)均超过2×10~8cmHz~(1/2)/W.室温下短波探测器D~·_(bb)超过10~8cmHz~(1/2)/W.

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研究了InAs/GaAs量子点光致发光光谱中出现的多峰结构.观察到随着激发功率的增加光谱中发光峰的数目逐渐增多并且部分发光峰的峰位随激发功率的增加向高能量方向移动.解释了各发光峰的来源并结合量子点能级结构的特点,计算了量子点中电子和空穴各子带间的能级间距.

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采用分子束外延(MBE)技术,在GaSb(100)衬底上外延生长InAs(4ML)/GaSb(8ML)超晶格(SLs)。研究了生长温度(400~440℃)对超晶格晶体结构和表面形貌的影响。结果表明,420℃生长的超晶格结构完整和表面粗糙度最小,其荧光光谱(PL)峰值波长在约2.54μm处,响应光谱50%截止波长在约2.4μm处。通过控制快门顺序形成InSb和混合两种界面,并发现生长温度强烈影响混合界面InAs/GaSb超晶格结构和表面形貌,而对InSb界面超晶格的影响较小。

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通过优化分子束外延生长条件,得到室温发光在1300nm低密度的自组织InAs/GaAs量子点。使用极低的InAs生长速率(0.001单层/秒)可以把量子点的密度降低到4×10~6cm~(-2)。这些结果使得InAs/GaAs量子点可以作为单光子源应用在未来的光纤基量子密码、量子通信中。

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液滴外延生长半导体材料是一种较为新颖的MBE生长技术,而图形衬底对液滴外延的影响到目前为止并没有非常详细的研究结果.作者在GaAsμm级别图形衬底上进行了InAs的液滴外延生长,并在不同结构的图形衬底上得到了不同的InAs量子点和量子环生长结果.基于生长结果,分析了图形衬底对液滴外延的影响和液滴外延下量子点和量子环的形成机制以及分布规律.

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We present a staggered buffer connection method that provides flexibility for buffer insertion while designing global signal networks using the tile-based FPGA design methodology. An exhaustive algorithm is used to analyze the trade-off between area and speed of the global signal networks for this staggered buffer insertion scheme, and the criterion for determining the design parameters is presented. The comparative analytic result shows that the methods in this paper are proven to be more efficient for FPGAs with a large array size.