A Low-Voltage Silicon Light Emitting Device in Standard Salicide CMOS Technology

National Natural Science Foundation of China 60536030 60776024 60877035 90820002 National High-Technology Research and Development Program of China 2007AA04Z329 2007AA04Z254

Clemaps: Multiple Alignment Of Protein Structures Based On Conformational Letters

CLEMAPS is a tool for multiple alignment of protein structures. It distinguishes itself from other existing algorithms for multiple structure alignment by the use of conformational letters, which are discretized states of 3D segmental structural states. A letter corresponds to a cluster of combinations of three angles formed by C-alpha pseudobonds of four contiguous residues. A substitution matrix called CLESUM is available to measure the similarity between any two such letters. The input 3D structures are first converted to sequences of conformational letters. Each string of a fixed length is then taken as the center seed to search other sequences for neighbors of the seed, which are strings similar to the seed. A seed and its neighbors form a center-star, which corresponds to a fragment set of local structural similarity shared by many proteins. The detection of center-stars using CLESUM is extremely efficient. Local similarity is a necessary, but insufficient, condition for structural alignment. Once center-stars are found, the spatial consistency between any two stars are examined to find consistent star duads using atomic coordinates. Consistent duads are later joined to create a core for multiple alignment, which is further polished to produce the final alignment. The utility of CLEMAPS is tested on various protein structure ensembles.

Phase variations and phase shift in a TE011 mode microwave cavity used for in a miniature Rb fountain frequency standard

It is the first time in China that the phase variations and phase shift of microwave cavity in a miniature Rb fountain frequency standard are studied, considering the effect of imperfect metallic walls. Wall losses in the microwave cavity lead to small traveling wave components that deliver power from the cavity feed to the walls of cavity. The small traveling wave components produce a microradian distribution of phase throughout the cavity ity, and therefore distributed cavity phase shifts need to be considered. The microwave cavity is a TE011 circular cylinder copper cavity, with round cut-hole of end plates (14mm in diameter) for access for the atomic flux and two small apertures in the center of the side wall for coupling in microwave power. After attenuation alpha is calculated, field variations in cavity are solved. The field variations of the cavity are given. At the same time, the influences of loaded quality factor QL and diameter/height (2a/d) of the microwave cavity on the phase variations and phase shift are considered. According to the phase variation and phase shift of microwave cavity we select the parameters of cavity, diameter 2a = 69.2mm, height d = 34.6mm, QL = 5000, which will result in an uncertainty delta(Delta f / f0 ) < 4.7 x 10(-17) and meets the requirement for the miniature Rb fountain frequency standard with accuracy 10(-15).

Multimode resonances in metallically confined square-resonator microlasers

Directional emission InP/AlGaInAs square-resonator microlasers with a side length of 20 mu m are fabricated by standard photolithography and inductively coupled-plasma etching technique. Multimode resonances with about seven distinct mode peaks in a free-spectral range are observed from 1460 to 1560 nm with the free-spectral range of 12.1 nm near the wavelength of 1510 nm, and the mode refractive index versus the photon energy E (eV) as 3.07152+0.18304E are obtained by fitting the laser spectra with an analytical mode wavelength formula derived by light ray method. In addition, mode field pattern is simulated for cold cavity by two dimensional finite-difference time-domain technique.

Directional emission InP/GaInAsP square-resonator microlasers

InP/GaInAsP square-resonator microlasers with an output waveguide connected to the midpoint of one side of the square are fabricated by standard photolithography and inductively-coupled-plasma etching technique. For a 20-mu m-side square microlaser with a 2-mu m-wide output waveguide, cw threshold current is 11 mA at room temperature, and the highest mode Q factor is 1.0 X 10(4) measured from the mode linewidth at the injection current of 10 mA. Multimode oscillation is observed with the lasing mode wavelength 1546 nm and the side-mode suppression ratio of 20 dB at the injection current of 15 mA. (C) 2008 Optical Society of America

An improved TM method for full two-port calibration of the asymmetric test fixtures

Three known standards, including at least one transmission standard, are normally required for the full two-port calibration of test fixtures. Based on the triple-through method, a new general-purpose calibration procedure using only one known reflection standard is proposed in this paper. The experimental results show that our method call provide a simple and accurate approach to fall two-port calibration of the asymmetric test fixtures. (c) 2005 Wiley Periodicals, Inc.

Room-temperature continuous-wave electrically injected InP-GaInAsP equilateral-triangle-resonator lasers

Equilateral-triangle-resonator (ETR) microlasers with an output waveguide connected to one of the vertices of the ETR are suitable to be a light source for photonic integrated circuits. InP-GaInAsP ETR lasers with side length from 10 to 30 pm and the output-waveguide width of 1 or 2 pm are fabricated using standard photolithography and inductively coupled-plasma etching techniques. Continuous-wave electrically injected 1520-nm ETR laser with 20-mu m sides is realized with the maximum output power 0.17 and 0.067 mW and the threshold current 34 and 43 mA at 290 K and 295 K, respectively.

Silicon light emitting devices in CMOS technology

Two silicon light emitting devices with different structures are realized in standard 0.35 mu m complementary metal-oxide-semiconductor (CMOS) technology. They operate in reverse breakdown mode and can be turned on at 8.3 V. Output optical powers of 13.6 nW and 12.1 nW are measured at 10 V and 100 mA, respectively, and both the calculated light emission intensities are more than 1 mW/Cm-2. The optical spectra of the two devices are between 600-790 nm with a clear peak near 760 nm..

Monolithic Integration of Light Emitting Diodes, Photodetector and Receiver Circuit in Standard CMOS Technology

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated with standard 0.35 mu m CMOS technology. This OEIC circuit consists of light emitting diodes (LED), silicon dioxide waveguide, photodiodes and receiver circuit. The silicon LED operates in reverse breakdown mode and can be turned on at 8.5V 10mA. The silicon dioxide waveguide is composed of multiple layers of silicon dioxide between different metals layers. A two PN-junctions photodetector composed of n-well/p-substrate junction and p(+) active implantation/n-well junction maximizes the depletion region width. The readout circuitry in pixels is exploited to handle as small as 0.1nA photocurrent. Simulation and testing results show that the optical emissions powers are about two orders higher than the low frequency detectivity of silicon CMOS photodetcctor and receiver circuit.

Design of Low Power Multi-Standard Active-RC Filter for WLAN and DVB-H

In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

A 1Gb/s silicon photo-receiver in standard CMOS for 850-nm optical communication

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with standard 0.6 mu m CMOS technology. This OEIC circuit consisted of an integrated double photodiode detector (DPD) and a preamplifier. The DPD detector exhibited high bandwidth by screening the bulk-generated diffusion carriers and suppressing the slow diffusion tail effect. The preamplifier exploited the regulated cascode (RGC) configuration as the input stage of receiver, thus isolating the influence of photodiode capacitance and input parasitic capacitance on bandwidth. Testing results showed that the bandwidth of OEIC was 700MHz, indicating the bit rate of 1Gb/s was achieved.

A standard CMOS compatible monolithic photo-detector and trans-impedance amplifier

A 1GHz monolithic photo-detector (PD) and trans-impedance amplifier (TIA) is designed with the standard 0.35 mu m CMOS technique. The design of the photo-detector is analyzed and the CMOS trans-impedance amplifier is also analyzed in the paper. The integrating method is described too. The die photograph is also showed in the paper.

A silicon light emitting devices in standard CMOS technology

A silicon light emitting device is designed and simulated. It is fabricated in 0.6 mum standard CMOS technology. The device can give more than 1 muW optical power of visible light under reverse breakdown. The device can be turned on at a bias of 0.88 V and work in a large range of voltage: 1.0-6.0 V The external electrical-optical conversion efficiency is more than 10(-6). The optical spectrum of the device is between 540-650 nm, which have a clear peak near 580 nm. The emission mechanism can be explained by a hot carrier direct recombination model.

An Ultra Low Power Non-volatile Memory in Standard CMOS Process for Passive RFID Tags

An ultra low power non-volatile memory is designed in a standard CMOS process for passive RFID tags. The memory can operate in a new low power operating scheme under a wide supply voltage and clock frequency range. In the charge pump circuit the threshold voltage effect of the switch transistor is almost eliminated and the pumping efficiency of the circuit is improved. An ultra low power 192-bit memory with a register array is implemented in a 0.18 mu M standard CMOS process. The measured results indicate that, for the supply voltage of 1.2 volts and the clock frequency of 780KHz, the current consumption of the memory is 1.8 mu A (3.6 mu A) at the read (write) rate of 1.3Mb/s (0.8Kb/s).