260 resultados para single-electron tunneling (SET)

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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In this paper, a cellular neural network with depressing synapses for contrast-invariant pattern classification and synchrony detection is presented, starting from the impulse model of the single-electron tunneling junction. The results of the impulse model and the network are simulated using simulation program with integrated circuit emphasis (SPICE). It is demonstrated that depressing synapses should be an important candidate of robust systems since they exhibit a rapid depression of excitatory postsynaptic potentials for successive presynaptic spikes.

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This paper proposes a novel single electron random number generator (RNG). The generator consists of multiple tunneling junctions (MTJ) and a hybrid single electron transistor (SET)/MOS output circuit. It is an oscillator-based RNG. MTJ is used to implement a high-frequency oscillator,which uses the inherent physical randomness in tunneling events of the MTJ to achieve large frequency drift. The hybrid SET and MOS output circuit is used to amplify and buffer the output signal of the MTJ oscillator. The RNG circuit generates high-quality random digital sequences with a simple structure. The operation speed of this circuit is as high as 1GHz. The circuit also has good driven capability and low power dissipation. This novel random number generator is a promising device for future cryptographic systems and communication applications.

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Real-time detection of single electron tunneling through a T-shaped double quantum dot is simulated, based on a Monte Carlo scheme. The double dot is embedded in a dissipative environment and the presence of electrons on the double dot is detected with a nearby quantum point contact. We demonstrate directly the bunching behavior in electron transport, which leads eventually to a super-Poissonian noise. Particularly, in the context of full counting statistics, we investigate the essential difference between the dephasing mechanisms induced by the quantum point contact detection and the coupling to the external phonon bath. A number of intriguing noise features associated with various transport mechanisms are revealed.

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The traditional monostable-bistable transition logic element (MOBILE) structure is usually composed of resonant tunneling diodes (RTD). This letter describes a new type MOBILE structure consisting of single-electron transistors (i.e. SET-MOBILE). The analytical model of single-electron transistors ( SET) has been considered three states (including an excited state) of the discrete quantum energy levels. The simulation results show negative differential conductance (NDC) characteristics in I-DS-V-DS curve. The SET-MOBILE utilizing NDC characteristics can successfully realize the basic logic functions as the RTD-MOBILE.

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This paper proposes a novel single-electron multiple-valued memory. It is a metal-oxide-semiconductor field effect transistor (MOS)-type memory with multiple separate control gates and floating gate layer, which consists of nano-crystal grains. The electron can tunnel among the grains (floating gates) and between the floating gate layer and the MOS channel. The memory can realize operations of 'write', 'store' and 'erase' of multiple-valued signals exceeding three values by controlling the single electron tunneling behavior. We use Monte Carlo method to simulate the operation of single-electron four-valued memory. The simulation results show that it can operate well at room temperature.

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This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid phase-frequency detector (PFD) circuit and a SE turnstile/MOS hybrid frequency divider. The phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. We propose a SPICE model to describe the behavior of the MOSFET-based SE turnstile. The authors simulate the performance of the PILL block circuits and the whole PLL synthesizer. Simulation results indicated that the circuit can well perform the operation of the PLL frequency synthesizer at room temperature. The PILL synthesizer is very compact. The total number of the transistors is less than 50. The power dissipation of the proposed PLL circuit is less than 3 uW. The authors discuss the effect of fabrication tolerance, the effect of background charge and the SE transfer accuracy on the performance of the PLL circuit. A technique to compensate parameter dispersions of SEDs is proposed.

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This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

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In this paper we consider the continuous weak measurement of a solid-state qubit by single electron transistors (SET). For single-dot SET, we find that in nonlinear response regime the signal-to-noise ratio can violate the universal upper bound imposed quantum mechanically on any linear response detectors. We understand the violation by means of the cross-correlation of the detector currents. For double-dot SET, we discuss its robustness against wider range of temperatures, quantum efficiency, and the relevant open issues unresolved.

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We present a theoretical study on the electron tunneling through a single barrier created in a two-dimensional electron gas (2DEG) and quantum spin Hall (QSH) bar in a HgTe/CdTe quantum well with inverted band structures. For the 2DEG, the transmission shows the Fabry-Perot resonances for the interband tunneling process and is blocked when the incident energy lies in the bulk gap of the barrier region. For the QSH bar, the transmission gap is reduced to the edge gap caused by the finite size effect. Instead, transmission dips appear due to the interference between the edge states and the bound states originated from the bulk states. Such a Fano-like resonance leads to a sharp dip in the transmission which can be observed experimentally.

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This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

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We study electron tunneling through a planar magnetic and electric barrier on the surface of a three-dimensional topological insulator. For the double barrier structures, we find (i) a directional-dependent tunneling which is sensitive to the magnetic field configuration and the electric gate voltage, (ii) a spin rotation controlled by the magnetic field and the gate voltage, (iii) many Fabry-Perot resonances in the transmission determined by the distance between the two barriers, and (iv) the electrostatic potential can enhance the difference in the transmission between the two magnetization configurations, and consequently lead to a giant magnetoresistance. Points (i), (iii), and (iv) are alike with that in graphene stemming from the same linear-dispersion relations.

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A reproducible terahertz (THz) photocurrent was observed at low temperatures in a Schottky wrap gate single electron transistor with a normal-incident of a CH_3OH gas laser with the frequency 2. 54THz.The change of source-drain current induced by THz photons shows that a satellite peak is generated beside the resonance peak. THz photon energy can be characterized by the difference of gate voltage positions between the resonance peak and satellite peak. This indicates that the satellite peak exactly results from the THz photon-assisted tunneling. Both experimental results and theoretical analysis show that a narrow spacing of double barriers is more effective for the enhancement of THz response.

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This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders. (C) 2009 Elsevier Ltd. All rights reserved.

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Submicron Hall magnetometry has been demonstrated as an efficient technique to probe extremely weak magnetic fields. In this letter, we analyze the possibility of employing it to detect single electron spin. Signal strength and readout time are estimated and discussed with respect to a number of practical issues. (C) 2005 American Institute of Physics.

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Owing to a few unique advantages, the double-dot single electron transistor has been proposed as an alternative detector for charge states. In this work, we present a further study for its signal-to-noise property, based on a full analysis of the setup configuration symmetry. It is found that the effectiveness of the double-dot detector can approach that of an ideal detector, if the symmetric capacitive coupling is taken into account. The quantum measurement efficiency is also analyzed by comparing the measurement time with the measurement-induced dephasing time.