428 resultados para Microstructure fabrication
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FD SOI MOSFETs with MESA and Irradiated FD SOI MOSFETs with LOCOS isolation usually show the edge effect, that is, the leakage current called hump is generated in the subthreshold region. According to different reasons for generating the edge effect, rounded corner process and BTS structure are applied to improve device performance. The results indicate that the above two methods are effective to reduce the edge effect and qualified devices are fabricated successfully.
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In this paper, the SiC-based clamped-clamped filter was designed and fabricated. The filter was composed of two clamped-clamped beam micromechanical resonators coupled by a spring coupling beam. Structural geometries, including the length and width of the resonator beam and coupling beam, were optimized by simulation for high frequency and high Q, under the material properties of SiC. The vibrating modes for the designed filter structure were analyzed by finite element analysis (FEA) method. For the optimized structure, the geometries of resonator beams and coupling beams, as well as the coupling position, the SiC-based clamped-clamped filter was fabricated by surface micromaching technology.
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An improved selective area growth (SAG) method is proposed to better the fabrication and performance of the Electroabsorption modulated laser The typical threshold current of the EML is 18mA, and the output power is 5.6mW at EAM facet.
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We report on the design and fabrication of a photonic crystal (PC) channel drop filter based on an asymmetric silicon-on-insulator (SOI) slab. The filter is composed of two symmetric stick-shape micro-cavities between two single-line-defect (W1) waveguides in a triangular lattice, and the phase matching condition for the filter to improve the drop efficiency is satisfied by modifying the positions and radii of the air holes around the micro-cavities. A sample is then fabricated by using electron beam lithography (EBL) and inductively coupled plasma (ICP) etching processes. The measured 0 factor of the filter is about 1140, and the drop efficiency is estimated to be 73% +/- 5% by fitting the transmission spectrum.
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We present detailed design, fabrication, and characterization issues of submicron rib waveguides based on silicon-on-insulator. The waveguides fabricated by EBL and ICP processes have propagation loss of 1.8dB/mm and bend loss of 0.14dB/90 degrees for bends with radius of 5 mu m.
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A fabrication method of silicon nanostructures is presented. Silicon nanowire, shift-line structure and islands have been successfully fabricated on SOI wafer using e-beam lithography and anisotropic etching technique.
Fabrication and characterization of two-dimensional photonic crystal on silicon by efficient methods
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Two-dimensional photonic crystals working in near infrared region are fabricated into silicon-on-insulator wafer by 248-nm deep UV lithography. We present an efficient way to measure the photonic crystal waveguide's light transmission spectra at given polarization states.
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Optoelectronic packaging has become a most important factor that influences the final performance and cost of the module. In this paper, low microwave loss coplanar waveguide(CPW) on high resistivity silicon(HRS) and precise V groove in silicon substrate were successfully fabricated. The microwave attenuation of the CPW made on HRS with the simple process is lower than 2 dB/cm in the frequency range of 0 similar to 26GHz, and V groove has the accuracy in micro level and smooth surface. These two techniques built a good foundation for high frequency packaging and passive coupling of the optoelectronic devices. Based on these two techniques, a simple high resistivity silicon substrate that integrated V groove and CPW for flip-chip packaging of lasers was completed. It set a good example for more complicate optoelectronic packaging.
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Low cost Si-based tunable InGaAs RCE photodetectors operating at 1.3similar to1.6 mum were fabricated using sol-gel bonding. A tuning range of 14.5 nm, a quantum efficiency of 44% at 1476 nm and a 3-dB bandwidth of 1.8 GHz were obtained.
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Microcrystalline silicon films were deposited by very high frequency (VHF) plasma-enhanced chemical vapor deposition (PECVD) with different hydrogen dilution. The microstructure of these films was investigated using Raman spectroscopy and infrared absorption (IR) spectra. The crystalline, amorphous, and grain boundary volume fractions X-c, X-a and X-gb were estimated from Raman measurements. An interface structure factor (R-if) is proposed to characterize the grain boundary volume fractions in IR spectroscopy. The density of states (DOS) of the microcrystalline crystalline silicon films were studied by phase-shift analysis of modulated photocurrent (MPC) and photoconductivity spectroscopy. It was observed that DOS increases with increasing grain boundary volume fractions, while the values of electron mobility-lifetime product mu T-e(e) disease.
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A new-style silica planar lightwave circuit (PLC) hybrid integrated triplexer, which can demultiplex 1490-nm download data and 1550-nm download analog signals, as well as transmit 1310-nm upload data, is presented. It combines SiO2 arrayed waveguide gratings (AWGs) with integrated photodetectors (PDs) and a high performance laser diode (LD). The SiO2 AWGs realize the three-wavelength coarse wavelength-division multiplexing (CWDM). The crosstalk is less than 40 dB between the 1490- and 1550-nm channels, and less than 45 dB between 1310- and 1490- or 1550-nm channels. For the static performances of the integrated triplexer, its upload output power is 0.4 mW, and the download output photo-generated current is 76 A. In the small-signal measurement, the upstream 3-dB bandwidth of the triplexer is 4 GHz, while the downstream 3-dB bandwidths of both the analog and digital sections reach 1.9 GHz.
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A new method has been developed to selectively fabricate nano-gap electrodes and nano-channels by conventional lithography. Based on a sacrificial spacer process, we have successfully obtained sub-100-nm nano-gap electrodes and nano-channels and further reduced the dimensions to 20 nm by shrinking the sacrificial spacer size. Our method shows good selectivity between nano-gap electrodes and nano-channels due to different sacrificial spacer etch conditions. There is no length limit for the nano-gap electrode and the nano-channel. The method reported in this paper also allows for wafer scale fabrication, high throughput, low cost, and good compatibility with modern semiconductor technology.
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Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-06-07T01:33:41Z No. of bitstreams: 1 ApplPhysLett_96_213505.pdf: 1153920 bytes, checksum: 69931d8deb797813dd478b5dd0e292c0 (MD5)
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An eight-channel monolithically integrated complex-coupled distributed-feedback laser array based on sampled gratings has been designed and fabricated. Selective lasing at different wavelengths is obtained. The frequency separation between each adjacent channel is about 200 GHz. The typical threshold current is between 30 and 40 mA. The optical output power of each channel is about 10 mW at an injection current of 100 mA. The continuous tuning of emission wavelength with injected currents is also demonstrated.
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n-ZnO/p-Si heterojunction light-emitting diodes (LEDs) show weak defect-related electroluminescence (EL). In order to analyze the origin of the weak EL, the energy band alignment and interfacial microstructure of ZnO/Si heterojunction are investigated by x-ray photoelectron spectroscopy. The valence band offset (VBO) is determined to be 3.15 +/- 0.15 eV and conduction band offset is -0.90 +/- 0.15 eV, showing a type-II band alignment. The higher VBO means a high potential barrier for holes injected from Si into ZnO, and hence, charge carrier recombination takes place mainly on the Si side rather than the ZnO layer. It is also found that a 2.1 nm thick SiOx interfacial layer is formed at the ZnO/Si interface. The unavoidable SiOx interfacial layer provides to a large number of nonradiative centers at the ZnO/Si interface and gives rise to poor crystallinity in the ZnO films. The weak EL from the n-ZnO/p-Si LEDs can be ascribed to the high ZnO/Si VBO and existence of the SiOx interfacial layer.