Novel folding large-scale optical switch matrix with total internal reflection mirrors on silicon-on-insulator by anisotropy chemical etching

A compact optical switch matrix was designed, in which light circuits were folded by total internal reflective (TIR) mirrors. Two key elements, 2 x 2 switch and TIR mirror, have been fabricated on silicon-on-insulator wafer by anisotropy chemical etching. The 2 x 2 switch showed very low power consumption of 140 mW and a very high speed of 8 +/- 1 mus. An improved design for the TIR mirror was developed, and the fabricated mirror with smooth and vertical reflective facet showed low excess loss of 0.7 +/- 0.3 dB at 1.55 mum.

A 2x2 optical switch based on plasma dispersion effect in silicon-on-insulator

Based on Mach-Zehnder interferometer (MZI) structure, a 2 x 2 optical switch is fabricated on SOI wafer. Modulation of the refractive index of MZI arms is achieved through free carriers plasma dispersion effect of silicon. The device presents an insertion loss as low as 3.44 dB and a response time as small as 300 ns. The crosstalk and extinction ratio are -15.54 and 14.9 dB, respectively. Detailed analysis and explanation of the operating behaviors are also presented. (C) 2005 Elsevier B.V. All rights reserved.

Investigation of a chemically treated InP(100) surface during hydrophilic wafer bonding process

Surface micro-roughness, surface chemical properties, and surface wettability are three important aspects of wafer surfaces during a wafer cleaning process, which determine the bonding quality of ordinary direct wafer bonding. In this study, InP wafers are divided into four groups and treated by different chemical processes. Subsequently, the characteristics of the treated InP surfaces are carefully studied by X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), and contact angle measurements. The optimal wafer treatment method for wafer bonding is determined by comparing the results of the processes as a whole. This optimization is later evaluated by a scanning electronic microscope (SEM), and the ridge waveguide 1.55 mu m Si-based InP/InGaAsP multi-quantum-well laser chips are also fabricated. (c) 2005 Elsevier B.V. All rights reserved.

Annealing and activation of silicon implanted in semi-insulating InP substrates

We have investigated the annealing and activation of silicon implanted in both as-grown Fe-doped semi-insulating (SI) InP substrate and undoped SI InP substrate obtained by annealing high purity conductive InP wafer (wafer-annealed). Si implantations were performed at an energy of 500 keV and a dose of 1 X 10(15) cm(-2). Following the implantations, rapid thermal annealing (RTA) cycles were carried out for 30 s at different temperatures. The results of Raman measurements show that for 700degreesC/30s RTA, the two Si-implanted SI InP substrates have acquired a high degree of lattice recovery and electrical activation. However, further Hall measurements indicate that the carrier concentration of the wafer-annealed SI InP substrate is about three times higher than that of the as-grown Fe-doped SI InP substrate. The difference can be ascribed to the low Fe concentration of the wafer-annealed SI InP substrate.These experimental data imply that the use of the wafer-annealed SI InP substrate can be conducive to the improvement of InP-based device performances. (C) 2003 Elsevier Ltd. All rights reserved.

Heteroepitaxial growth and annealing of gamma-Al2O3 thin films on silicon

The gamma-Al2O3 films were grown on Si (100) substrates using the sources of TMA (Al (CH3)(3)) and O-2 by very low-pressure chemical vapor deposition (VLP-CVD). It has been found that the gamma-Al2O3 film has a mirror-like surface and the RMS was about 2.5nm. And the orientation relationship was gamma-Al2O3(100)/Si(100). The thickness uniformity of gamma-Al2O3 films for 2-inch epi-wafer was less than 5%. The X-ray diffraction (XRD) and reflection high-energy electron diffraction (RHEED) results show that the crystalline quality of the film was improved after the film was annealed at 1000degreesC in O-2 atmosphere. The high-frequency C-V and leakage current of Al/gamma-Al2O3/Si capacitor were also measured to verify the annealing effect of the film. The results show that the dielectric constant increased from 4 to 7 and the breakdown voltage for 65-nm-thick gamma-Al2O3 film on silicon increases from 17V to 53V.

Very low-pressure VLP-CVD growth of high quality gamma-Al2O3 films on silicon by multi-step process

gamma-Al2O3 films were grown on Si (10 0) substrates using the sources of TMA (AI(CH3)(3)) and O-2 by very low-pressure chemical vapor deposition. The effects of temperature control on the crystalline quality, surface morphology, uniformity and dielectricity were investigated. It has been found that the,gamma-Al2O3 film prepared at a temperature of 1000degreesC has a good crystalline quality, but the surface morphology, uniformity and dielectricity were poor due to the etching reaction between 0, and Si substrate in the initial growth stage. However, under a temperature-varied multi-step process the properties Of gamma-Al2O3 film were improved. The films have a mirror-like surface and the dielectricity was superior to that grown under a single-step process. The uniformity of gamma-Al2O3 films for 2-in epi-wafer was <5%, it is better than that disclosed elsewhere. In order to improve the crystalline quality, the gamma-Al2O3 films were annealed for I h in O-2 atmosphere. (C) 2002 Elsevier Science B.V. All rights reserved.

New annealing processes and explanation for novel silicon pn junctions formed by proton implantation

Proton-implanted n-type Si wafers were annealed at 950 degrees C to achieve novel pn junctions. The novel pn junctions are explained by the combined use of four models. The background (e.g. oxygen impurity) of an Si wafer is suggested to play a key role in creating the novel pn junction.

Polarization-Independent Micro-Ring Resonator on Silicon-on-Insulator

Polarization-independent laterally-coupled micro-ring resonator has been designed and demonstrated. The origin of the polarization-sensitivity of the photonic wire waveguide (PWW) was analyzed. A polarization-insensitive PWW structure was designed and a polarization-insensitive MRR based on this PWW structure was designed by finite difference time-domain method and was fabricated on an 8-inch silicon-on-insulator wafer. The offset between the resonant wavelengths of the quasi-TE mode and the quasi-TM mode is smaller than 0.15 nm. The FSR is about 17 nm, extinction ratio about 10 dB and Q about 620.

Fabrication method of silicon nanostructures by anisotropic etching

A fabrication method of silicon nanostructures is presented. Silicon nanowire, shift-line structure and islands have been successfully fabricated on SOI wafer using e-beam lithography and anisotropic etching technique.

Fabrication and characterization of two-dimensional photonic crystal on silicon by efficient methods

Two-dimensional photonic crystals working in near infrared region are fabricated into silicon-on-insulator wafer by 248-nm deep UV lithography. We present an efficient way to measure the photonic crystal waveguide's light transmission spectra at given polarization states.

The improvement of thick oxidized porous silicon layer growth process - art. no. 60290S

Oxidizing thick porous silicon layer into silicon dioxide is a timesaving and low-cost process for producing thick silicon dioxide layer used in silicon-based optical waveguide devices. The solution of H2O2 is proposed to post-treat thick porous silicon (PS) films. The prepared PS layer as the cathode is applied about 10 mA/cm(2) current in mixture of ethanol, HF, and H2O2 solutions, in order to improve the stability and the smoothness of the surface. With the low-temperature dry-O-2 pre-oxidizations and high-temperature wet O-2 oxidizations process, a high-quality SiO2 30 mu m thickness layer that fit for the optical waveguide device was prepared. The SEM images show significant improved smoothness on the surface of oxidized PS thick films, the SiO2 film has a stable and uniformity reflex index that measured by the prism coupler, the uniformity of the reflex index in different place of the wafer is about 0.0003.

Polycrystalline silicon thin films and solar cells prepared by rapid thermal CVD

Polycrystalline silicon (poly-Si) films(similar to 10 mu m) were grown from dichlorosilane by a rapid thermal chemical vapor deposition (RTCVD) technique, with a growth rate up to 100 Angstrom/s at the substrate temperature (T-s) of 1030 degrees C. The average grain size and carrier mobility of the films were found to be dependent on the substrate temperature and material. By using the poly-Si films, the first model pn(+) junction solar cell without anti-reflecting (AR) coating has been prepared on an unpolished heavily phosphorus-doped Si wafer, with an energy conversion efficiency of 4.54% (AM 1.5, 100 mW/cm(2), 1 cm(2)).

Heteroepitaxial Growth of 3C-SiC Films on Maskless Patterned Silicon Substrates

Heteroepitaxial growth of 3C-SiC on patterned Si substrates by low pressure chemical vapor deposition (LPCVD) has been investigated to improve the crystal quality of 3C-SiC films. Si substrates were patterned with parallel lines, 1 to 10μm wide and spaced 1 to 10μm apart, which was carried out by photolithography and reactive ion etching. Growth behavior on the patterned substrates was systematically studied by scanning electron microscopy (SEM). An air gap structure and a spherical shape were formed on the patterned Si substrates with different dimensions. The air gap formed after coalescence reduced the stress in the 3C-SiC films, solving the wafer warp and making it possible to grow thicker films. XRD patterns indicated that the films grown on the maskless patterned Si substrates were mainly composed of crystal planes with (111) orientation.

Fabrication of Silicon Crystal-Facet-Dependent Nanostructures by Electron-Beam Lithography

Silicon crystal-facet-dependent nanostructures have been successfully fabricated on a (100)-oriented silicon-on-insulator wafer using electron-beam lithography and the silicon anisotropic wet etching technique. This technique takes ad-vantage of the large difference in etching properties for different crystallographic planes in alkaline solution. The mini-mum size of the trapezoidal top for those Si nanostructures can be reduced to less than 10nm. Scanning electron microscopy(SEM) and atomic force microscopy (AFM) observations indicate that the etched nanostructures have controllable shapes and smooth surfaces.

Polymorphous silicon nanowires synthesized by plasma-enhanced chemical vapor deposition

Polymorphous Si nanowires (SiNWS) have been successfully synthesized on Si wafer by plasma enhanced chemical vapor deposition (PECVD) at 440degreesC,using silane as the Si source and Au as the catalyst. To grow the polymorphous SiNWS preannealing the Si substrate with Au film at 1100 degreesC is needed. The diameters of Si nanowires range from 15 to 100 urn. The structure morphology and chemical composition of the SiNWS have been characterized by high resolution x-ray diffraction, scanning electron microscopy, transmission electron microscopy, as well as energy dispersive x-ray spectroscopy. A few interesting nanowires with Au nanoclusters uniformly distributed in the body of the wire were also produced by this technique.