Stoichiometric defects in semi-insulating GaAs

The influences of arsenic interstitials and dislocations on the lattice parameters of undoped semi-insulating (SI) GaAs single crystals were analyzed. It was shown that the dislocations in such crystals serve as effective gettering sites for arsenic interstitials due to the deformation energy of dislocations. The average excess arsenic in GaAs epilayers grown by molecular-beam epitaxy (MBE) at low temperatures (LT) is about 1%, and the lattice parameters of these epilayers are larger than those of liquid-encapsulated Czochralski-grown (LEG) SI-GaAs by about 0.1%. The atomic ratio, [As]/([Ga] + [As]), in SI-GaAs grown by low-pressure (LP) LEC is the nearest to the strict stoichiometry compared with those grown by high-pressure (HP) LEC and vertical gradient freeze (VGF). After multiple wafer annealing (MWA), the crystals grown by HPLEC become closer to be strictly stoichiometric.

Effects of point defects on lattice parameters of semiconductors

A model for analyzing the correlation between lattice parameters and point defects in semiconductors has been established. The results of this model for analyzing the substitutes in semiconductors are in accordance with those from Vegard's law and experiments. Based on this model, the lattice strains caused by the antisites, the tetrahedral and octahedral single interstitials, and the interstitial couples are analyzed. The superdilation in lattice parameters of GaAs grown at low temperatures by molecular-beam epitaxy can be interpreted by this model, which is in accordance with the experimental results. This model provides a way of analyzing the stoichiometry in bulk and epitaxial compound semiconductors nondestructively.

A transmission electron microscopy study of microstructural defects in proton implanted silicon

The microstructure of silicon on defect layer, a new type of silicon-on-insulator material using proton implantation and two-step annealing to obtain a high resistivity buried layer beneath the silicon surface, has been investigated by transmission electron microscopy. Implantation induced a heavily damaged region containing two types of extended defects involving hydrogen: {001} platelets and {111} platelets. During the first step annealing, gas bubbles and {111} precipitates formed. After the second step annealing, {111} precipitates disappeared, while the bubble microstructure still remained and a buried layer consisting of bubbles and dislocations between the bubbles was left. This study shows that the dislocations pinning the bubbles plays an important role in stabilizing the bubbles and in the formation of the defect insulating layer. (C) 1996 American Institute of Physics.

Investigation on the N-eff reverse annealing effect using TSC/I-DLTS: Relationship between neutron induced microscopic defects and silicon detector electrical degradations

Neutron induced defect levels in high resistivity silicon detectors have been studied using a current-based macroscopic defect analysis system: thermally stimulated current (TSC) and current deep level transient spectroscopy (I-DLTS). These studies have been correlated to the traditional C-V, I-V, and transient current and charge techniques (TCT/TChT) after neutron radiation and subsequent thermal anneals. It has been found that the increases of the space charge density, N-eff, in irradiated detectors after thermal anneals (N-eff reverse anneal) correspond to the increases of deep levels in the silicon bandgap. In particular, increases of the double vacancy center (V-V and V-V-- -) and/or C-i-O-i level have good correlations with the N-eff reverse anneal. It has also been observed that the leakage current of highly irradiated (Phi(n) > 10(13) n/cm(2)) detectors increases after thermal anneals, which is different from the leakage current annealing behavior of slightly irradiated (Phi(n) < 10(13) n/cm(2)) detectors. It is apparent that V-V center and/or C-i-O-i level play important roles in both N-eff and leakage current degradations for highly irradiated high resistivity silicon detectors.

Microscopic analysis of defects in a high resistivity silicon detector irradiated to 1.7x10(15)n/cm(2)

Current-based microscopic defect analysis methods with optical filling techniques, namely current deep level transient spectroscopy (I-DLTS) and thermally stimulated current (TSC), have been used to study defect levels in a high resistivity silicon detector (p(+)-n-n(+)) induced by very high fluence neutron (VHFN) irradiation (1.7x10(15) n/cm(2)). As many as fourteen deep levels have been detected by I-DLTS. Arrhenius plots of the I-DLTS data have shown defects with energy levels ranging from 0.03 eV to 0.5 eV in the energy band gap. Defect concentrations of relatively shallow levels (E(t) < 0.33 eV) are in the order of 10(13)cm(-3), while those for relatively deep levels (E(t) > 0.33 eV) are in the order of 10(14) cm(-3). TSC data have shown similar defect spectra. A full depletion voltage of about 27,000 volts has been estimated by C-V measurements for the as-irradiated detector, which corresponds to an effective space charge density (N-eff) in the order of 2x10(14) cm(-3). Both detector leakage current and full depletion voltage have been observed to increase with elevated temperature annealing (ETA). The increase of the full depletion voltage corresponds to the increase of some deep levels, especially the 0.39 eV level. Results of positron annihilation spectroscopy have shown a decrease of total concentration of vacancy related defects including vacancy clusters with ETA, suggesting the breaking up of vacancy clusters as possible source of vacancies for the formation of single defects during the reverse anneal.

Fabrication of a Silicon-Based Microprobe for Neural Interface Applications

A two-dimensional (2D) multi-channel silicon-based microelectrode array is developed for recording neural signals. Three photolithographic masks are utilized in the fabrication process. SEM images show that the microprobe is 1. 2mm long,100μm wide,and 30μm thick, with recording sites spaced 200μm apart for good signal isolation. For the individual recording sites, the characteristics of impedance versus frequency are shown by in vitro testing. The impedance declines from 14MΩ to 1.9kv as the frequency changes from 0 to 10MHz. A compatible PCB (print circuit board) aids in the less troublesome implantation and stabilization of the microprobe.

Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings

A monolithic integrated CMOS preamplifier is presented for neural recording applications. Two AC-coupied capacitors are used to eliminate the large and random DC offsets existing in the electrode-electrolyte interface. Diode-connected nMOS transistors with a negative voltage between the gate and source are candidates for the large resistors necessary for the preamplifier. A novel analysis is given to determine the noise power spectral density. Simulation results show that the two-stage CMOS preamplifier in a closed-loop capacitive feedback configuration provides an AC in-band gain of 38.8dB,a DC gain of 0,and an input-referred noise of 277nVmax, integrated from 0. 1Hz to 1kHz. The preamplifier can eliminate the DC offset voltage and has low input-referred noise by novel circuit configuration and theoretical analysis.

Non-stoichiometry Related Deep Level Defects in Semi-insulating InP

Semi-insulating (SI) InP materials have been prepared under different stoichiometric conditions, including Fe-doping in indium-rich melt and high temperature annealing undoped wafer in phosphorus and iron phosphide ambients. Deep level defects related with non-stoichiometry have been detected in the SI-InP samples. A close relationship between the material quality of electrical property and native deep defects has been revealed by a comprehensive study of defects in as-grown Fe-doped and annealed undoped SI-InP materials. Fe-doped SI-InP material with low carrier mobility and poor thermal stability contains a high concentration of deep defects with energy levels in the range of 0.1-0.4eV. The suppression of the defects by high temperature annealing undoped InP leads to the manufacture of high quality SI-InP with high mobility and good electrical uniformity. A technology for the growth of high quality SI-InP through stoichiometry control has been proposed based on the results.