998 resultados para Wood Architecture


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Arsenic can be highly toxic to mammals but there is relatively little information on its transfer to and uptake by free-living small mammals. The aim of this study was to determine whether intake and accumulation of arsenic by wild rodents living in arsenic-contaminated habitats reflected environmental levels of contamination and varied between species, sexes and age classes. Arsenic concentrations were measured in soil, litter, wood mice (Apodemus sylvaticus) and bank voles (Clethrionomys glareolus) from six sites which varied in the extent to which they were contaminated. Arsenic residues on the most contaminated sites were three and two orders of magnitude above background in soil and litter, respectively. Arsenic concentrations in the stomach contents, liver, kidney and whole body of small mammals reflected inter-site differences in environmental contamination. Wood mice and bank voles on the same sites had similar concentrations of arsenic in their stomach contents and accumulated comparable residues in the liver, kidney and whole body. Female bank voles, but not wood mice, had significantly higher stomach content and liver arsenic concentrations than males. Arsenic concentration in the stomach contents and body tissues did not vary with age class. The bioaccumulation factor (ratio of arsenic concentration in whole body to that in the diet) in wood mice was not significantly different to that in bank voles and was 0.69 for the two species combined, indicating that arsenic was not bioconcentrated in these rodents. Overall, this study has demonstrated that adult and juvenile wood mice and bank voles are exposed to and accumulate similar amounts of arsenic on arsenic-contaminated mine sites and that the extent of accumulation depends upon the level of habitat contamination.

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A forest ecosystem was contaminated as a result of a fire involving 600 t of PVC. A wide range of 2,3,7,8-substituted dioxin and furan congeners were elevated (by up to 4-fold) on soil adjacent to the factory compared to a site 200 m from the factory perimeter. Livers of wood mice (Apodemus sylvaticus) caught on these areas were also analysed for dioxins and furans. Toxic equivalents (TEQs) were 9-fold higher in wood mice caught on the site 10 m from the factory perimeter compared with the site 200 m from the perimeter, with individual 2,3,7,8-substituted congeners being elevated by up to 30-fold. Wood mouse liver TEQs were found to be highly correlated with cadmium kidney concentrations, cadmium also being found at elevated concentrations at the accident site. There was also a significant positive correlation between wood mouse liver TEQs and relative liver weights (wet weights expressed as a percentage of total body weight). The results of this study are discussed in the wider context of dioxin contamination in the environment.

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A novel high performance bit parallel architecture to perform square root and division is proposed. Relevant VLSI design issues have been addressed. By employing redundant arithmetic and a semisystolic schedule, the throughput has been made independent of the size of the array.

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In this paper, a novel configurable content addressable memory (CCAM) cell is proposed, to increase the flexibility of embedded CAMs for SoC employment. It can be easily configured as a Binary CAM (BiCAM) or Ternary CAM (TCAM) without significant penalty of power consumption or searching speed. A 64x128 CCAM array has been built and verified through simulation. ©2007 IEEE.

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A high-performance VLSI architecture to perform combined multiply-accumulate, divide, and square root operations is proposed. The circuit is highly regular, requires only minimal control, and can be reconfigured for every cycle. The execution time for each operation is the same. The combination of redundancy and pipelining results in a throughput independent of the wordsize of the array. With current CMOS technology, throughput rates in excess of 80 million operations per second are achievable.

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The application of fine grain pipelining techniques in the design of high performance Wave Digital Filters (WDFs) is described. It is shown that significant increases in the sampling rate of bit parallel circuits can be achieved using most significant bit (msb) first arithmetic. A novel VLSI architecture for implementing two-port adaptor circuits is described which embodies these ideas. The circuit in question is highly regular, uses msb first arithmetic and is implemented using simple carry-save adders. © 1992 Kluwer Academic Publishers.

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A novel bit-level systolic array architecture for implementing bit-parallel IIR filter sections is presented. The authors have shown previously how the fundamental obstacle of pipeline latency in recursive structures can be overcome by the use of redundant arithmetic in combination with bit-level feedback. These ideas are extended by optimizing the degree of redundancy used in different parts of the circuit and combining redundant circuit techniques with those of conventional arithmetic. The resultant architecture offers significant improvements in hardware complexity and throughput rate.

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A bit-level systolic array system for performing a binary tree Vector Quantization codebook search is described. This consists of a linear chain of regular VLSI building blocks and exhibits data rates suitable for a wide range of real-time applications. A technique is described which reduces the computation required at each node in the binary tree to that of a single inner product operation. This method applies to all the common distortion measures (including the Euclidean distance, the Weighted Euclidean distance and the Itakura-Saito distortion measure) and significantly reduces the hardware required to implement the tree search system. © 1990 Kluwer Academic Publishers.

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In this paper, a new reconfigurable multi-standard architecture is introduced for integer-pixel motion estimation and a standard-cell based chip design study is presented. This has been designed to cover most of the common block-based video compression standards, including MPEG-2, MPEG-4, H.263, H.264, AVS and WMV-9. The architecture exhibits simpler control, high throughput and relative low hardware cost and highly competitive when compared with excising designs for specific video standards. It can also, through the use of control signals, be dynamically reconfigured at run-time to accommodate different system constraint such as the trade-off in power dissipation and video-quality. The computational rates achieved make the circuit suitable for high end video processing applications. Silicon design studies indicate that circuits based on this approach incur only a relatively small penalty in terms of power dissipation and silicon area when compared with implementations for specific standards.

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Details of a new low power FFT processor for use in digital television applications are presented. This has been fabricated using a 0.6 µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-rime video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8×8 mm and dissipates 1 W. Its performance, in terms of computational rate per area per watt, is significantly higher than previously reported devices, leading to a cost-effective silicon solution for high quality video processing applications. This is the result of using a novel VLSI architecture which has been derived from a first principles factorisation of the DFT matrix and tailored to a direct silicon implementation.

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The paper presents a state-of-the-art commercial demonstrator chip for infinite impulse response (IIR) filtering. The programmable IIR filter chip contains eight multiplier/accumulators that can be configured in one of five different modes to implement up to a 16th-order IIR filter. The multiply-accumulate block is based on a highly regular systolic array architecture and uses a redundant number system to overcome problems of pipelining in the feedback loop. The chip has been designed using the GEC Plessey Semiconductors CLA 78000 series gate array, operates on 16-bit two's complement data and has a clock speed of 30 MHz. Issues such as overflow detection and design for testability have also been addressed and are described.

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Numerous reports of successful radiocarbon dating of cremated bones have emerged during the last decade. The success of radiocarbon dating cremated bones depends on the temperature during burning and the degree of recrystallisation of the inorganic bone matrix. During cremation bones undergo major morphological and mineralogical changes which have raised some interesting questions and discussion on the origin of the carbon source in archaeologically cremated bones. Recent laboratory experiments reveal that the properties of the combustion atmosphere play a significant role regarding the source carbon in cremated bones. Thus radiocarbon dating cremated bones is potentially dating the wood used for the cremation fire. Here we compare a high precision radiocarbon dated human bone with an associated dendrochronological age from an oak coffin. We find that the age discrepancy between the dendrochronological age and the cremated bone of 73 ± 26 14C yr is best accounted for by the so called ‘old wood’ effect.

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This paper details an international research project which examined over 50 architecture centres in 23 countries including four case study subjects:
•Kent Architecture Centre, England
•Chicago Architecture Foundation
•Museum of Finnish Architecture
•Netherlands Architecture Institute
The paper analyzes the project's main findings including issues of definition, reasons for foundation, cultural policy impact and the main goals of architecture centres. It summarizes recommendations for centres as they attempt to reach their aims.