Recent progresses of SOI-based photonic devices - art. no. 60201R

SOI (Silicon on Insulator) based photonic devices, including stimulated emission from Si diode, RCE (Resonant Cavity Enhanced) photodiode with quantum structure, MOS (Metal Oxide Semiconductor) optical modulator with high frequency, SOI optical matrix switch and wavelength tunable filter are reviewed in the paper. The emphasis will be played on our recent results of SOI-based thermo-optic waveguide matrix switch with low insertion loss and fast response. A folding re-arrangeable non-blocking 4x4 matrix switch with total internal reflection (TIR) mirrors and a first blocking 16 x 16 matrix were fabricated on SOI wafer. The extinction ratio and the crosstalk are better. The insertion loss and the polarization dependent loss (PDL) at 1.55 mu m increase slightly with longer device length and more bend and intersecting waveguides. The insertion losses are expected to decrease 2-3 dB when anti-reflection films are added in the ends of the devices. The rise and fall times of the devices are 2.1 mu s and 2.3 mu s, respectively.

Recent progresses of silicon-based optoelectronic devices for application in fiber communication

Si-based optoelectronic devices, including stimulated emission from Si diode, 1.3 and 1.5mum SiGe photodetector with quantum structures, 1GHz MOS optical modulator, SOI optical switch matrix and wavelength tunable filter are reviewed in the paper.

Circuit design and simulation of a CMOS-based preamplifier for brain neural signals

A novel CMOS-based preamplifier for amplifying brain neural signal obtained by scalp electrodes in brain-computer interface (BCI) is presented in this paper. By means of constructing effective equivalent input circuit structure of the preamplifier, two capacitors of 5 pF are included to realize the DC suppression compared to conventional preamplifiers. Then this preamplifier is designed and simulated using the standard 0.6 mu m MOS process technology model parameters with a supply voltage of 5 volts. With differential input structures adopted, simulation results of the preamplifier show that the input impedance amounts to more than 2 Gohm with brain neural signal frequency of 0.5 Hz-100 Hz. The equivalent input noise voltage is 18 nV/Hz(1/2). The common mode rejection ratio (CMRR) of 112 dB and the open-loop differential gain of 90 dB are achieved.

Monolithic optical gates based on integration of evanescently-coupled uni-traveling-carrier photodiodes and electroabsorption modulators

We report on chip-scale optical gates based on the integration of evanescent waveguide unitraveling-carrier photodiodes (EC-UTC-PDs) and intra-step quantum well electroabsorption modulators (IQW-EAMs) on n-InP substrates. These devices exhibit simultaneously 2.1 GHz and -16.2 dB RF-gain at 21 GHz with a 450 Omega thin-film resistor and a bypass capacitor integrated on a chip.

ELECTRONIC-STRUCTURES OF THE ALKALI-CONTAINING BUCKMINSTERFULLERENES (A-DELTA-C60) (A=LI,NA,K,RB,CS) AND THE HALOGEN-CONTAINING BUCKMINSTERFULLERENES (H-DELTA-C60) (H=F,CL,BR,I)

The geometrical parameters and electronic structures of C60, (A partial derivative C60) (A = Li, Na, K, Rb, Cs) and (H partial derivative C60) (H = F, Cl, Br, I) have been calculated by the EHMO/ASED (atom superposition and electron delocalization) method. When putting a central atom into the C60 cage, the frontier and subfrontier orbitals of (A partial derivative C60) (A = Li, Na, K, Rb, Cs) and (H partial derivative C60) (H = F, Cl) relative to those of C60 undergo little change and thus, from the viewpoint of charge transfer, A (A = Li, Na, K, Rb, Cs) and H (H = F, Cl) are simply electron donors and acceptors for the C60 cage resPeCtively. Br is an electron acceptor but it does influence the frontier and subfrontier MOs for the C60 cage, and although there is no charge transfer between I and the C60 cage, the frontier and subfrontier MOs for the C60 cage are obviously influenced by I. The stabilities DELTAE(X) (DELTAE(X) = (E(X) + E(C60)) - E(x partial derivative C60)) follow the sequence I < Br < None < Cl < F < Li < Na < K < Rb < Cs while the cage radii r follow the inverse sequence. The stability order and the cage radii order have been explained by means of the (exp-6-1) potential.

THE DEPENDENCE OF THE INVERSION LAYER THICKNESS ON THE FILM THICKNESS IN THIN-FILM SOI STRUCTURES

The dependence of the inversion-layer thickness on the film thickness in thin-film SOI structure is analyzed theoretically by using computer simulation. A new concept and parameter, the critical thickness of thin film all-bulk inversion, is introduced for the design of thin-film MOS/SOI devices. It is necessary to select the film thickness T(s1) close to the all-bulk strong inversion critical thickness in order to get high-speed and high-power operation of ultra-thin film MOS/SOI devices.

A 10-bit 50-MS/s sample-and-hold circuit with low distortion sampling switches

A fully-differential switched-capacitor sample-and-hold (S/H) circuit used in a 10-bit 50-MS/s pipeline analog-to-digital converter (ADC) was designed and fabricated using a 0.35-μm CMOS process. Capacitor fliparound architecture was used in the S/H circuit to lower the power consumption. In addition, a gain-boosted operational transconductance amplifier (OTA) was designed with a DC gain of 94 dB and a unit gain bandwidth of 460 MHz at a phase margin of 63 degree, which matches the S/H circuit. A novel double-side bootstrapped switch was used, improving the precision of the whole circuit. The measured results have shown that the S/H circuit reaches a spurious free dynamic range (SFDR) of 67 dB and a signal-to-noise ratio (SNR) of 62.1 dB for a 2.5 MHz input signal with 50 MS/s sampling rate. The 0.12 mm~2 S/H circuit operates from a 3.3 V supply and consumes 13.6 mW.

A Novel 4T nMOS-Only SRAM Cell in 32nm Technology Node

This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator （SO1） technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic ＂1＂ while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable ＂read＂ operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin （SNM） of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.

A Numerical Method for Calculating Transmission Coefficients Across Arbitrary Potential Barriers with High Accuracy

We report a new method for calculating transmission coefficients across arbitrary potential barriers based on the Runge-Kutta method. A numerical solution of the Schrodinger equation is calculated using the Runge-Kutta method,and a new model is established to analyze the numerical results to find the transmission coefficient. This technique is applied to various cases, such as parabolic potential barrier and double-barrier structures. Transmission probability with high precision is obtained and discussed. The tunnelling current density through a MOS structure is also explored and the result coincides with the Fowler-Nordheim model,which indicates the applicability of our method.

SOI光波导高速电光调制器的研究进展

介绍了不同截面大小的SOI(silicon-on-insulator)波导单模条件,详细描述了几种降低传输损耗,消除偏振相关,提高耦合效率的技术手段.分析比较了一种带有MOS(metal-oxide-semiconductor)电容结构和一种具有微环结构的高速电光调制器,其调制频率分别达到10和1.5GHz.

Sensitivity of Total-Dose Radiation Hardness of SIMOX Buried Oxides to Doses of Nitrogen Implantation into Buried Oxides

In order to improve the total-dose radiation hardness of the buried oxides(BOX) in the structure of separa tion-by-implanted-oxygen(SIMOX) silicon-on-insulator(SOI), nitrogen ions are implanted into the buried oxides with two different doses,2 × 1015 and 3 × 1015 cm-2 , respectively. The experimental results show that the radiation hardness of the buried oxides is very sensitive to the doses of nitrogen implantation for a lower dose of irradiation with a Co-60 source. Despite the small difference between the doses of nitrogen implantation, the nitrogen-implanted 2 × 1015 cm-2 BOX has a much higher hardness than the control sample (i. e. the buried oxide without receiving nitrogen implantation) for a total-dose irradiation of 5 × 104rad(Si), whereas the nitrogen-implanted 3 × 1015 cm-2 BOX has a lower hardness than the control sample. However,this sensitivity of radiation hardness to the doses of nitrogen implantation reduces with the increasing total-dose of irradiation (from 5 × 104 to 5 × 105 rad (Si)). The radiation hardness of BOX is characterized by MOS high-frequency (HF) capacitance-voltage (C-V) technique after the top silicon layers are removed. In addition, the abnormal HF C-V curve of the metal-silicon-BOX-silicon(MSOS) structure is observed and explained.

部分耗尽型SOI CMOS模拟电路设计研究

介绍了部分耗尽型SOI MOS器件浮体状态下的Kink效应及对模拟电路的影响.阐述了4种常用体接触方式及其他消除部分耗尽型SOI MOS器件Kink效应的工艺方法,同时给出了部分耗尽型SOIMOSFET工作在浮体状态下时模拟电路的设计方法.

注氮工艺对SIMOX器件电特性的影响

研究了氮离子注入对SIMOX器件电特性的影响.氮注入SIMOX的埋氧层并退火后,将减小前栅MOS-FET/SIMOX的阈电压,提高其漏源击穿电压但对栅击穿电压影响较小.氮注入方式对SIMOX器件的I-V特性有重要影响.

突破间接带局限创新Si基激光器

Si基高效发光与受激光发射是Si基光子学突破性发展的关键课题,它的实现对Si基微电子学的发展有深远的重大意义.由于受到天然Si材料间接带能带结构的限制,Si材料的发光效率极低,更谈不上可实现受激光发射,人工改性就成为当代研究、开拓的主要途径.新的Si基直接带体材料(如β-FeSi2等)的探索,Ge/Si量子阱、超晶格、量子点的能带工程介观改性,子带发光跃迁的探索,异类元素插入短周期超晶格中的化学键改性,以及SiO2高浓度nc-Si的生成和高激活度稀土离子的掺入发光等已开展了多途径的研究,不同程度上取得了重要的进展,一种MIS结构电子隧道注入高效发光器件已在SiO2:RE MOS结构中实现.运用激光器件物理的深入设计和新的器件技术的引入,可以预计本世纪初叶,对实现Si基激光器的奢望将会成为现实,无疑它对Si基光子学、Si基集成光电子学乃至信息高科技的发展将作出历史性的巨大贡献.

新型硅基双异质外延SOI材料Si/γ-Al_2O_3/Si制备

异质外延法是目前制备新型SOI材料的技术途径之一。采用低压化学气相沉积技术(LPCVD)在硅衬底上先外延r-A1-2O-3绝缘单晶薄膜，制备出硅衬底上外延氧化物外延结构r-Al-2O-3／Si(EOS)，然后采用类似SOS薄膜生长的常压CVD(APCVD)方法在EOS上外延硅单晶薄膜，形成新型硅基双异质SOl材料Si／r-Al-2O-3／Si。利用反射高能电子衍射(RHEED)、X射线衍射(XRD)、俄歇电子能谱(AES)及MOS电学测量等技术表征分析了Si(100)／r-Al-2O-3(100)／Si(100)SOI异质结构的晶体结构、组分和电学性能。测试结果表明，已成功实现了高质量的新型双异质外延SOI结构材料Si(100)／ r-Al-2O-3(100)／Si(100)，r-Al-2O-3与Si外延薄膜均为单晶，r-Al-2O-3薄膜具有良好绝缘性能，SOI结构界面清晰陡峭，该SOI材料可应用于CMOS电路的研制。