Experimental study of a pulsed ytterbium-doped fibre laser with fast and slow saturable absorbers in a linear cavity

We present a linear-cavity stretched-pulse fibre laser with mode locking by a nonlinear polarization rotation and by semiconductor saturable-absorber mirrors. A Q-switched mode-locking cw train and a mode-locking pulse train are obtained in the experiment. We investigate the effects of the equivalent fast saturable absorber and the slow saturable absorbers in experiment. It is found that neither the nonlinear polarization evolution effect nor a semiconductor saturable absorber mirror is enough to produce the stable cw mode-locking pulses in this experiment. A nonlinear polarization evolution effect controls the cavity loss to literally carve the pulses; semiconductor saturable absorber mirrors provide the self-restarting and maintain the stability of the mode-locking operation.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

Raman evidence for atomic correlation between the two constituent tubes in double-walled carbon nanotubes

Four well-resolved peaks with very narrow linewidths were found in the D-band and G'-band features of double-walled carbon nanotubes (DWNTs). This fact implies the occurrence of additional van Hove singularities (vHSs) in the joint density of states (JDOS) of DWNTs, which is consistent with theoretical calculations. According to their peak frequencies and theoretical analysis, the two outer peaks can be deduced to originate from a strong coupling between the two constituent tubes of commensurate DWNTs and the two inner peaks were curvature-related and assigned to originate from the two tubes with a weak coupling. This observation and elucidation constitute the first Raman evidence for atomic correlation and the resulting electronic structure change of the two constituent tubes in DWNTs. This result opens the possibility of predicting and modifying the electronic properties of DWNTs for their electronic applications.

Shape and spatial correlation control of InAs-InAlAs-InP(001) nanostructure superlattices

The control of shape and spatial correlation of InAs-InAlAs-InP(001) nanostructure superlattices has been realized by changing the As overpressure during the molecular-beam epitaxy (MBE) growth of InAs layers. InAs quantum wires (QWRs) are obtained under higher As overpressure (1x10(-5) Torr), while elongated InAs quantum dots (QDs) are formed under lower As overpressure (5x10(-6) or 2.5x10(-6) Torr). Correspondingly, spatial correlation changes from vertical anti-correlation in QWR superlattices to vertical correlation in QD superlattices, which is well explained by the different alloy phase separation in InAlAs spacer layers triggered by the InAs nanostrcutures. It was observed that the alloy phase separation in QD superlattices could extend a long distance along the growth direction, indicating the vertical correlation of QD superlattices can be kept in a wide range of spacer layer thickness.

Correlation effects for semiconducting single-wall carbon nanotubes: A density matrix renormalization group study

In this paper we report the applicability of the density matrix renormalization group (DMRG) approach to the cylindrical single wall carbon nanotube (SWCN) for the purpose of its correlation effect. By applying the DMRG approach to the t+U+V model, with t and V being the hopping and Coulomb energies between the nearest neighboring sites, respectively, and U the on-site Coulomb energy, we calculate the phase diagram for the SWCN with chiral numbers (n(1)=3, n(2)=2), which reflects the competition between the correlation energy U and V. Within reasonable parameter ranges, we investigate possible correlated ground states, the lowest excitations, and the corresponding correlation functions in which the connection with the excitonic insulator is particularly addressed.

Correlation of structural and optical investigation of InGaAs/InAlAs quantum cascade laser

Double X-ray diffraction has been used to investigate InGaAs/InAlAs quantum cascade (QC) laser grown on InP substrate by molecule beam epitaxy, by means of which, excellent lattice matching, the interface smoothness, the uniformity of the thickness and the composition of the epilayer are disclosed. What is more, these results are in good agreement with designed value. The largest lattice mismatch is within 0.18% and the intersubband absorption wavelength between two quantized energy levels is achieved at about lambda = 5.1 mum at room temperature. At 77 K, the threshold density of the QC laser is less than 2.6 kA/cm(2) when the repetition rate is 5 kHz and the duty cycle is 1%. (C) 2003 Elsevier Science B.V. All rights reserved.

Correlation between Er3+ emission and the microstructure of a-SiOx : H < Er > films

Photoluminescence (PL) from Er-implanted hydrogenated amorphous silicon suboxide (a-SiOX:H(x<2.0)) films was measured. Two luminescence bands with maxima at lambda congruent to 750 nm and lambda congruent to 1.54mum, ascribed to the a-SiOX:H intrinsic emission and Er3+ emission, were observed. Peak intensities of the two bands follow the same trend as a function of annealing temperature from 300 to 1000degreesC. Micro-Raman results indicate that the a-SiOX:H films are a mixture of two phases, an amorphous SiOX matrix and amorphous silicon (a-Si) domains embedded there in. FTIR spectra confirm that hydrogen effusion from a-SiOX:H films occurs during annealing. Hydrogen effusion leads to a reconstruction of the microstructure of a-Si domains, thus having a strong influence on Er3+ emission. Our study emphasizes the role of a-Si domains on Er3+ emission in a-SiOX:H films.

Correlation of calibration equations for test fixtures

This paper begins from the thru-short-open (TSO) and thru-line-match (TLM) methods to investigate the correlation of the calibration equations of these two methods, The relations among the measurements with the corresponding standards are obtained. It is found that the line standard with zero length can be used instead of ideal open and short, in case that two test fixtures are symmetrical. For asymmetrical fixtures, the measurements with the standards line, open and short are related at certain frequencies, and the matched load can be replaced by the line standards. The relations established are used to test short and match standards and analyze the freqPuency limits of the TSO method, Good agreement between theory and experiment is obtained, It is found that the TSO method becomes very poor when the insertion phase of the thru standard is near n pi/4, and this method has a lower frequency limit. The TLM method is found unsuitable for calibrating asymmetrical fixtures.

Hydrogen contaminant and its correlation with background electrons in GaN

GaN epilayers grown by molecular beam epitaxy using NH3 as the nitrogen source were found to contain hydrogen. We further notice that the background electron concentration in GaN can be correlated with the amount of hydrogen contaminant. X-ray photoelectron spectroscopy (XPS) measurements of the N Is peak reveal that hydrogen is bound to nitrogen. This will make the corresponding Ga atom see insufficient N counterpart, as can be inferred from the XPS Ga 3d spectrum. We then think that nitrogen in the lattice terminated by hydrogen is an effective nitrogen vacancy and hence a donor accounting for the background electrons.

Performing Fast Addition and Multiplication by Transferring Single Electrons

This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.

Fast Locking and High Accurate Current Matching Phase-Locked Loop

In this paper, a charge-pump based phase-locked loop (CPLL) that can achieve fast locking and tiny deviation is proposed and analyzed. A lock-aid circuit is added to achieve fast locking of the CPLL. Besides, a novel differential charge pump which has good current matching characteristics and a PFD with delay cell has been used in this PLL. The proposed PILL circuit is designed based on the 0.35um 2P4M CMOS process with 3.3V/5V supply voltage. HSPICE simulation shows that the lock time of the proposed CPLL can be reduced by over 72% in comparison to the conventional PILL and its charge pump sink and source current mismatch is only 0.008%.

A Fast-Locking Phase-Locked Loop Using a Seven-State Phase Frequency Detector

A seven-state phase frequency detector (S.S PFD) is proposed for fast-locking charge pump based phase-locked loops (CPPLLs) in this paper. The locking time of the PLL can be significantly reduced by using the seven-state PFD to inject more current into the loop filter. In this stage, the bandwidth of the PLL is increased or decreased to track the phase difference of the reference signal and the feedback signal. The proposed architecture is realized in a standard 0.35 mu m 2P4M CMOS process with a 3.3V supply voltage. The locking time of the proposed PLL is 1.102 mu s compared with the 2.347 mu s of the PLL based on continuous-time PFD and the 3.298 mu s of the PLL based on the pass-transistor tri-state PFD. There are 53.05% and 66.59% reductions of the locking time. The simulation results and the comparison with other PLLs demonstrate that the proposed seven-state PFD is effective to reduce locking time.

Correlation Between Lattice Strain and Energy Gap Bowing of AlxGa1-xN Epitaxial Thin Films

The correlation between the energy band-gap of AlxGa1-xN epitaxial thin films and lattice strain was investigated using both High Resolution X-ray Diffraction (HRXRD) and Spectroscopic Ellipsometry (SE). The Al fraction, lattice relaxation, and elastic lattice strain were determined for all AlxGa1-xN epilayers, and the energy gap as well. Given the type of intermediate layer, a correlation trend was found between energy band-gap bowing parameter and lattice mismatch, the higher the lattice mismatch is, the smaller the bowing parameter (b) will be.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

An Accurate and Fast Behavioral Model for PLL Frequency Synthesizer Phase Noise/Spurs Prediction

This paper presents a behavior model for PLL Frequency Synthesizer. All the noise sources are modeled with noise voltages or currents in time-domain. An accurate VCO noise model is introduced, including both thermal noise and 1/f noise. The behavioral model can be co-simulated with transistor level circuits with fast speed and provides more accurate phase noise and spurs prediction. Comparison shows that simulation results match very well with measurement results.