997 resultados para Ferromagnet-semiconductor Interface


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In the present review, the measuring principle of reflectance difference spectroscopy (RDS) is given. As a powerful tool in the surface and interface analysis technologies, the application of RDS to the research on semiconductor materials is summarized. along with the origins of the in-plane optical anisotropy of semiconductors. And it is believed that RDS will play an important role in the electrooptic modification of Si-based semiconductor materials.

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We have demonstrated passive mode-locking in a diode-end-pumped Nd:YVO4 laser using two kinds of semiconductor absorbers whose relaxation region comes from In0.25Ga0.75As grown at low temperature (LT) and GaAs/air interface respectively Mode-locking, using absorbers of the GaAs/air interface relaxation region, has the characteristics of less Q-switching tendency and higher average output power than that using absorbers of LT In0.25Ga0.75As relaxation region, but is not as stable as the latter.

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A model for scattering due to interface roughness in finite quantum wells (QWs) is developed within the framework of the Boltzmann transport equation and a simple and explicit expression between mobility limited by interface roughness scattering and barrier height is obtained. The main advantage of our model is that it does not involve complicated wavefunction calculations, and thus it is convenient for predicting the mobility in thin finite QWs. It is found that the mobility limited by interface roughness is one order of amplitude higher than the results derived by assuming an infinite barrier, for finite barrier height QWs where x = 0.3. The mobility first decreases and then flattens out as the barrier confinement increases. The experimental results may be explained with monolayers of asperity height 1-2, and a correlation length of about 33 angstrom. The calculation results are in excellent agreement with the experimental data from AlxGa1-xAs/GaAs QWs.

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Ballistic spin polarized transport through diluted magnetic semiconductor single and double barrier structures is investigated theoretically using a two-component model. The tunneling magnetoresistance (TMR) of the system exhibits oscillating behavior when the magnetic field is varied. An interesting beat pattern in the TMR and spin polarization is found for different nonmagnetic semiconductor/diluted magnetic semiconductor double barrier structures which arises from an interplay between the spin-up and spin-down electron channels which are split by the s-d exchange interaction.

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Growth interruption-induced microroughness is studied by photoluminescence (PL) of single quantum wells with different well widths and interruption times. Analysis of the peak splitting in the PL spectra shows that the adjacent peak splittings correspond to well width differences smaller than one monolayer. The number of split peaks increases with increasing well width, saturating when the well width exceeds 11 monolayers. This trend correlates well with the decrease in the lateral dimension of the exciton, which corresponds roughly to the minimum optically sampled area of the interface. For a given quantum well, a plot of the normalized integrated intensities of the split PL peaks versus the well width fluctuation is well described by a Gaussian distribution with an average fluctuation smaller than one monolayer. These results are consistent with the microroughness model.

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Wafer bonding is regardless of lattice mismatch in the integration of dissimilar semiconductor materials. This technology differs from the heteroepitaxy mainly in the mechanism of generating dislocations at the interface. A model of dislocations at the bonded interface is proposed in this paper. Edge-like dislocations, which most efficiently relax the strain, are predominant at the bonded interface. But the thermal stress associated with large thermal expansion misfit may drive dislocations away from the bonded interface upon cooling.

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The origin of the flat band voltage roll-off (V-FB roll-off) in metal gate/high-k/ultrathin-SiO2/Si metal-oxide-semiconductor stacks is analyzed and a model describing the role of the dipoles at the SiO2/Si interface on the V-FB sharp roll-off is proposed. The V-FB sharp roll-off appears when the thickness of the SiO2 interlayer diminishes to below the oxygen diffusion depth. The results derived using our model agree well with experimental data and provide insights to the mechanism of the V-FB sharp roll-off.

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We investigated electrical properties of vanadyl phthalocyanine (VOPc) metal-insulator-semiconductor (MIS) devices by the measurement of capacitance and conductance, which were fabricated on ordered para-sexiphenyl (p-6P) layer by weak epitaxy growth method. The VOPc/p-6P MIS diodes showed a negligible hysteresis effect at a gate voltage of +/- 20 V and small hysteresis effect at a gate voltage of +/- 40 V due to the low interface trap state density of about 1x10(10) eV(-1) cm(-2). Furthermore, a high transition frequency of about 10 kHz was also observed under their accumulation mode. The results indicated that VOPc was a promising material and was suitable to be applied in active matrix liquid crystal displays and organic logic circuits.

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Copper phthalocyanine on InSb(111)A?interface bonding, growth mode and energy band alignment, D.A. Evans, H.J. Steiner, S. Evans, R. Middleton, T.S. Jones, S. Park, T.U. Kampen, D.R.T. Zahn, G. Cabailh and I.T. McGovern, J. Phys.: Condens. Matter, 15, S2729?S2740, (2003)

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The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

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A convenient microwave method in preparation of zinc oxide nanoparticles (ZnONPs) using an ionic liquid, trihexyltetradecylphosphonium bis{(trifluoromethyl)sulfonyl}-imide, [P-66614][NTf2], as a green solvent is described in this paper. To the best of our knowledge, there is no report for synthesizing any nanoparticle using this ionic liquid. Trihexyltetradecylphosphonium bis{(trifluoromethyl)sulfonyl}-imide has low interface tension and thus it can enhance the nucleation rate, which is favorable to the formation of smaller ZnONPs. The fabricated ZnONPs were characterized by X-ray diffraction (XRD), transmission electron microscopy (TEM), and UV-vis spectroscopy. The XRD pattern reveals that the ZnONPs have hexagonal wurtzite structure. The strong intensity and narrow width of ZnO diffraction peaks indicate that the resulting nanoparticles are of high crystallinity. The synthesized ZnONPs show direct band gap of 3.43 eV. The UV-vis absorption spectrum of ZnONPs dispersed in ethylene glycol at room temperature revealed a blue-shifted onset of absorption. (C) 2011 Elsevier Ltd. All rights reserved.

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Nesta tese investigam-se e desenvolvem-se dispositivos para processamento integralmente óptico em redes com multiplexagem densa por divisão no comprimento de onda (DWDM). O principal objectivo das redes DWDM é transportar e distribuir um espectro óptico densamente multiplexado com sinais de débito binário ultra elevado, ao longo de centenas ou milhares de quilómetros de fibra óptica. Estes sinais devem ser transportados e encaminhados no domínio óptico de forma transparente, sem conversões óptico-eléctrico-ópticas (OEO), evitando as suas limitações e custos. A tecnologia baseada em amplificadores ópticos de semicondutor (SOA) é promissora graças aos seus efeitos não-lineares ultra-rápidos e eficientes, ao potencial para integração, reduzido consumo de potência e custos. Conversores de comprimento de onda são o elemento óptico básico para aumentar a capacidade da rede e evitar o bloqueio de comprimentos de onda. Neste trabalho, são estudados e analisados experimentalmente métodos para aumentar a largura de banda operacional de conversores de modulação cruzada de ganho (XGM), a fim de permitir a operação do SOA para além das suas limitações físicas. Conversão de um comprimento de onda, e conversão simultânea de múltiplos comprimentos de onda são testadas, usando interferómetros de Mach-Zehnder com SOA. As redes DWDM de alto débito binário requerem formatos de modulação optimizados, com elevada tolerância aos efeitos nefastos da fibra, e reduzida ocupação espectral. Para esse efeito, é vital desenvolver conversores integramente ópticos de formatos de modulação, a fim de permitir a interligação entre as redes já instaladas, que operam com modulação de intensidade, e as redes modernas, que utilizam formatos de modulação avançados. No âmbito deste trabalho é proposto um conversor integralmente óptico de formato entre modulação óptica de banda lateral dupla e modulação óptica de banda lateral residual; este é caracterizado através de simulação e experimentalmente. Adicionalmente, é proposto um conversor para formato de portadora suprimida, através de XGM e modulação cruzada de fase. A interligação entre as redes de transporte com débito binário ultra-elevado e as redes de acesso com débito binário reduzido requer conversão óptica de formato de impulso entre retorno-a-zero (RZ) e não-RZ. São aqui propostas e investigadas duas estruturas distintas: uma baseada em filtragem desalinhada do sinal convertido por XGM; uma segunda utiliza as dinâmicas do laser interno de um SOA com ganho limitado (GC-SOA). Regeneração integralmente óptica é essencial para reduzir os custos das redes. Dois esquemas distintos são utilizados para regeneração: uma estrutura baseada em MZI-SOA, e um método no qual o laser interno de um GC-SOA é modulado com o sinal distorcido a regenerar. A maioria dos esquemas referidos é testada experimentalmente a 40 Gb/s, com potencial para aplicação a débitos binários superiores, demonstrado que os SOA são uma tecnologia basilar para as redes ópticas do futuro.

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The main focus and concerns of this PhD thesis is the growth of III-V semiconductor nanostructures (Quantum dots (QDs) and quantum dashes) on silicon substrates using molecular beam epitaxy (MBE) technique. The investigation of influence of the major growth parameters on their basic properties (density, geometry, composition, size etc.) and the systematic characterization of their structural and optical properties are the core of the research work. The monolithic integration of III-V optoelectronic devices with silicon electronic circuits could bring enormous prospect for the existing semiconductor technology. Our challenging approach is to combine the superior passive optical properties of silicon with the superior optical emission properties of III-V material by reducing the amount of III-V materials to the very limit of the active region. Different heteroepitaxial integration approaches have been investigated to overcome the materials issues between III-V and Si. However, this include the self-assembled growth of InAs and InGaAs QDs in silicon and GaAx matrices directly on flat silicon substrate, sitecontrolled growth of (GaAs/In0,15Ga0,85As/GaAs) QDs on pre-patterned Si substrate and the direct growth of GaP on Si using migration enhanced epitaxy (MEE) and MBE growth modes. An efficient ex-situ-buffered HF (BHF) and in-situ surface cleaning sequence based on atomic hydrogen (AH) cleaning at 500 °C combined with thermal oxide desorption within a temperature range of 700-900 °C has been established. The removal of oxide desorption was confirmed by semicircular streaky reflection high energy electron diffraction (RHEED) patterns indicating a 2D smooth surface construction prior to the MBE growth. The evolution of size, density and shape of the QDs are ex-situ characterized by atomic-force microscopy (AFM) and transmission electron microscopy (TEM). The InAs QDs density is strongly increased from 108 to 1011 cm-2 at V/III ratios in the range of 15-35 (beam equivalent pressure values). InAs QD formations are not observed at temperatures of 500 °C and above. Growth experiments on (111) substrates show orientation dependent QD formation behaviour. A significant shape and size transition with elongated InAs quantum dots and dashes has been observed on (111) orientation and at higher Indium-growth rate of 0.3 ML/s. The 2D strain mapping derived from high-resolution TEM of InAs QDs embedded in silicon matrix confirmed semi-coherent and fully relaxed QDs embedded in defectfree silicon matrix. The strain relaxation is released by dislocation loops exclusively localized along the InAs/Si interfaces and partial dislocations with stacking faults inside the InAs clusters. The site controlled growth of GaAs/In0,15Ga0,85As/GaAs nanostructures has been demonstrated for the first time with 1 μm spacing and very low nominal deposition thicknesses, directly on pre-patterned Si without the use of SiO2 mask. Thin planar GaP layer was successfully grown through migration enhanced epitaxy (MEE) to initiate a planar GaP wetting layer at the polar/non-polar interface, which work as a virtual GaP substrate, for the GaP-MBE subsequently growth on the GaP-MEE layer with total thickness of 50 nm. The best root mean square (RMS) roughness value was as good as 1.3 nm. However, these results are highly encouraging for the realization of III-V optical devices on silicon for potential applications.