529 resultados para ANODIZATION LITHOGRAPHY


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Photonic crystal devices with feature sizes of a few hundred nanometers are often fabricated by electron beam lithography. The proximity effect, stitching error and resist profiles have significant influence on the pattern quality, and therefore determine the optical properties of the devices. In this paper, detailed analyses and simple solutions to these problems are presented. The proximity effect is corrected by the introduction of a compensating dose. The influence of the stitching error is alleviated by replacing the original access waveguides with taper-added waveguides, and the taper parameters are also discussed to get the optimal choice. It is demonstrated experimentally that patterns exposed with different doses have almost the same edge-profiles in the resist for the same development time, and that optimized etching conditions can improve the wall angle of the holes in the substrate remarkably. (c) 2006 Elsevier B.V. All rights reserved.

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Nation Natural Science Foundation of China 50672079 60676027 60837001 60776007; National Basic Research Program of China (973 Program) 2007CB613404; China-MOST International Sci & Tech Cooperation and Exchange 2008DFA51230

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The techniques of fabricating metallic air bridges using different resists in a one-step electron beam lithography are presented. The exposure process employed a single-layer polymethyl methacrylate (PMMA) or photoresists with either different doses in the span and feet areas or with varying acceleration voltage of the electron beam. The process using photoresists with different doses has produced air bridges more stable than what the PMMA method using various acceleration voltages would achieve. Using this method, air bridges up to 12 mu m long have been fabricated. The length and height of these metallic air bridges vary with the photoresist thickness. (c) 2006 American Institute of Physics.

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The two-dimensional grid patterns on Si(001) in nanometer scale have been fabricated by holographic lithography and reactive ion etching, which can be used as a substrate for positioning Ge islands during self-assembled epitaxy to obtain an ordered Ge quantum dots matrix. By changing the configuration of the holographic lithography and the etching rate and time, we can control the grid period, the shape of the pattern cell, and the orientation of those shapes, respectively. (C) 2002 Elsevier Science B.V. All rights reserved.

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Silicon-based silica waveguide (SiO2/Si) devices have huge applications in optical telecommunication. SiO2 up to 25-mu m thick is necessary for some passive SiO2/Si waveguide devices. Oxidizing porous silicon to obtain thick SiO2 as cladding layer is presented. The experimental results of porous layer and oxidized porous layer formation were given. The relationship between cracking of SiO2 and temperature varying rate was given experimentally. Such conclusions are drawn: oxidation rate of porous silicon is several orders faster than that of bulk silicon; appropriate temperature variation rate during oxidation can prevent SiO2 on silicon substrates from cracking, and 25 mu m thick silicon dioxide layer has been obtained. (C) 2000 Elsevier Science B.V. All rights reserved.

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A new method has been developed to selectively fabricate nano-gap electrodes and nano-channels by conventional lithography. Based on a sacrificial spacer process, we have successfully obtained sub-100-nm nano-gap electrodes and nano-channels and further reduced the dimensions to 20 nm by shrinking the sacrificial spacer size. Our method shows good selectivity between nano-gap electrodes and nano-channels due to different sacrificial spacer etch conditions. There is no length limit for the nano-gap electrode and the nano-channel. The method reported in this paper also allows for wafer scale fabrication, high throughput, low cost, and good compatibility with modern semiconductor technology.

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Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-06-07T01:33:41Z No. of bitstreams: 1 ApplPhysLett_96_213505.pdf: 1153920 bytes, checksum: 69931d8deb797813dd478b5dd0e292c0 (MD5)

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A lithography-independent and wafer scale method to fabricate a metal nanogap structure is demon-strated. Polysilicon was first dry etched using photoresist (PR) as the etch mask patterned by photolithography.Then, by depositing conformal SiO_2 on the polysilicon pattern, etching back SiO_2 anisotropically in the perpendic-ular direction and removing the polysilicon with KOH, a sacrificial SiO_2 spacer was obtained. Finally, after metal evaporation and lifting-off of the SiO_2 spacer, an 82 nm metal-gap structure was achieved. The size of the nanogap is not determined by the photolithography, but by the thickness of the SiO_2. The method reported in this paper is compatible with modern semiconductor technology and can be used in mass production.

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Silicon crystal-facet-dependent nanostructures have been successfully fabricated on a (100)-oriented silicon-on-insulator wafer using electron-beam lithography and the silicon anisotropic wet etching technique. This technique takes ad-vantage of the large difference in etching properties for different crystallographic planes in alkaline solution. The mini-mum size of the trapezoidal top for those Si nanostructures can be reduced to less than 10nm. Scanning electron microscopy(SEM) and atomic force microscopy (AFM) observations indicate that the etched nanostructures have controllable shapes and smooth surfaces.

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We present an all-e-beam lithography (EBL) process for the patterning of photonic crystal waveguides.The whole device structures are exposed in two steps. Holes constituting the photonic crystal lattice and defects are first exposed with a small exposure step size (less than 10nm). With the introduction of the additional proximity effect to compensate the original proximity effect, the shape, size, and position of the holes can be well controlled.The second step is the exposure of the access waveguides at a larger step size (about 30nm) to improve the scan speed of the EBL. The influence of write-field stitching error can be alleviated by replacing the original waveguides with tapered waveguides at the joint of adjacent write-fields. It is found experimentally that a higher exposure efficiency is achieved with a larger step size;however,a larger step size requires a higher dose.

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Silicon-based silica waveguide (SiO2/Si) devices have huge applications in optical telecommunication. SiO2 up to 25-mu m thick is necessary for some passive SiO2/Si waveguide devices. Oxidizing porous silicon to obtain thick SiO2 as cladding layer is presented. The experimental results of porous layer and oxidized porous layer formation were given. The relationship between cracking of SiO2 and temperature varying rate was given experimentally. Such conclusions are drawn: oxidation rate of porous silicon is several orders faster than that of bulk silicon; appropriate temperature variation rate during oxidation can prevent SiO2 on silicon substrates from cracking, and 25 mu m thick silicon dioxide layer has been obtained. (C) 2000 Elsevier Science B.V. All rights reserved.

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This letter describes an approach to fabricating microlens arrays with low cost and large area through the combination of discontinuous dewetting and reversible water-ice transition via a soft lithography replica process. Microlenses with different curvature can be tuned by the modulation of the wettability of the substrates. The microlenses fabricated can project clear miniaturized images.

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The dewetting process of thin polystyrene (PS) film with built-in ordered disturbance by capillary force lithography (CFL) has. been investigated in situ by AFM. Two different phenomena are observed depending on the excess surface energy (DeltaF(gamma)) of the system. When DeltaF(gamma) is less than a certain critical value (i.e., the disturbance amplitude is under a critical value), the PS film would be flattened and become stable finally by heating above T-g. While, if the size of the disturbance amplitude is larger than the critical value, ordered PS liquid droplets form by further dewetting. The pattern formation mechanisms and influencing factors have been discussed in detail.

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X-2-y(2)SiO(5):A (A = Eu3+, Tb3+, Ce3+) phosphor films and their patterning were fabricated by a sol-gel process combined with a soft lithography. X-ray diffraction (XRD), Fourier transform infrared spectroscopy (FT-IR), atomic force microscopy (AFM), scanning electron microscopy (SEM) optical microscopy and photoluminescence (PL) were used to characterize the resulting films. The results of XRD indicated that the films began to crystallize at 900 degreesC with X-1-Y2SiO5, which transformed completely to X-2-Y2SiO5 at 1250 degreesC. Patterned thin films with different band widths (5 pin spaced by 5 pm and 16 pm spaced by 24 pm) were obtained by a soft lithography technique (micromoulding in capillaries, MIMIC). The SEM and AFM study revealed that the nonpattemed phosphor films were uniform and crack free, and the films mainly consisted of closely packed grains with an average size of 350 run. The doped rare earth ions (A) showed their characteristic emissions in X-2-Y2SiO5 phosphor films, i.e., D-5(0)-F-7(J) (J = 0, 1, 2,3,4) for Eu3+, D-5(3), (4)-F-7(J) (J = 6, 5, 4, 3) for Tb3+ and 5d (D-2)-4f (F-2(2/5),(2/7)) for Ce3+, respectively. The optimum doping concentrations for EU3+, Tb3+ were determined to be 13 and 8 mol% of Y3+ in X-2-Y2SiO5 films, respectively.