44 resultados para Ambipolar transistors

em QUB Research Portal - Research Directory and Institutional Repository for Queen's University Belfast


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Mixed-mode simulation, where device simulation is embedded directly within a circuit simulator, is used for the first time to provide scaling guidelines to achieve optimal digital circuit performance for double gate SOI MOSFETs. This significant advance overcomes the lack of availability of SPICE model parameters. The sensitivity of the gate delay and on-off current ratio to each of the key geometric and technological parameters of the transistor is quantified. The impact of the source-drain doping profile on circuit performance is comprehensively investigated.

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This paper provides a comprehensive analysis of thermal resistance of trench isolated bipolar transistors on SOI substrates based on 3D electro-thermal simulations calibrated to experimental data. The impact of emitter length, width, spacing and number of emitter fingers on thermal resistance is analysed in detail. The results are used to design and optimise transistors with minimum thermal resistance and minimum transistor area. (c) 2007 Elsevier Ltd. All rights reserved.

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This work presents a systematic analysis on the impact of source-drain engineering using gate

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Double gate fully depleted silicon-on-insulator (DGSOI) is recognized as a possible solution when the physical gate length L-G reduces to 25nm for the 65nm node on the ITRS CMOS roadmap. In this paper, scaling guidelines are introduced to optimally design a nanoscale DGSOI. For this reason, the sensitivity of gain, f(T) and f(max) to each of the key geometric and technological parameters of the DGSOI are assessed and quantified using MixedMode simulation. The impact of the parasitic resistance and capacitance on analog device performance is systematically analysed. By comparing analog performance with a single gate (SG), it has been found that intrinsic gain in DGSOI is 4 times higher but its fT was found to be comparable to that of SGSOI at different regions of transistor operation. However, the extracted fmax in SG SOI was higher (similar to 40%) compared to DGSOI due to its lower capacitance.

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Germanium NPN bipolar transistors have been manufactured using phosphorus and boron ion implantation processes. Implantation and subsequent activation processes have been investigated for both dopants. Full activation of phosphorus implants has been achieved with RTA schedules at 535?C without significant junction diffusion. However, boron implant activation was limited and diffusion from a polysilicon source was not practical for base contact formation. Transistors with good output characteristics were achieved with an Early voltage of 55V and common emitter current gain of 30. Both Silvaco process and device simulation tools have been successfully adapted to model the Ge BJT(bipolar junction transistor) performance.

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An inhomogeneous spatial distribution of laser accelerated carbon/oxygen ions produced via the hydrodynamic ambipolar expansion of CO2 clusters has been measured by using CR-39 detectors. An inhomogeneous etch pits spatial distribution has appeared on the etched CR-39 detector installed on the laser propagation direction, while homogeneous ones are appeared on those installed at 45°and 90°from the laser propagation direction. From the range of ions in CR-39 obtained by using the multi-step etching technique, the averaged energies of carbon/oxygen ions for all directions are determined as 0.78 ± 0.09 MeV/n. The number of ions in the laser propagation direction is about 1.5 times larger than those in other directions. The inhomogeneous etch pits spatial distribution in the laser propagation direction could originate from an ion beam collimation and modulation by the effect of electromagnetic structures created in the laser plasma.