Optimisation of trench isolated bipolar transistors on SOI substrates by 3D electro-thermal simulations
| Data(s) |
01/09/2007
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|---|---|
| Resumo |
This paper provides a comprehensive analysis of thermal resistance of trench isolated bipolar transistors on SOI substrates based on 3D electro-thermal simulations calibrated to experimental data. The impact of emitter length, width, spacing and number of emitter fingers on thermal resistance is analysed in detail. The results are used to design and optimise transistors with minimum thermal resistance and minimum transistor area. (c) 2007 Elsevier Ltd. All rights reserved. |
| Identificador |
http://dx.doi.org/10.1016/j.sse.2007.07.027 http://www.scopus.com/inward/record.url?scp=34548573099&partnerID=8YFLogxK |
| Idioma(s) |
eng |
| Direitos |
info:eu-repo/semantics/restrictedAccess |
| Fonte |
Nigrin , S , Armstrong , A & Kranti , A 2007 , ' Optimisation of trench isolated bipolar transistors on SOI substrates by 3D electro-thermal simulations ' SOLID-STATE ELECTRONICS , vol 51 , no. 9 , pp. 1221-1228 . DOI: 10.1016/j.sse.2007.07.027 |
| Palavras-Chave | #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering #/dk/atira/pure/subjectarea/asjc/2500/2504 #Electronic, Optical and Magnetic Materials #/dk/atira/pure/subjectarea/asjc/3100/3104 #Condensed Matter Physics |
| Tipo |
article |
