Scaling issues for analogue circuits using Double Gate SOI transistors

This work presents a systematic analysis on the impact of source-drain engineering using gate

The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance

In this paper, the analogue performance of a 65 nm node double gate Sol (DGSOI) is qualitatively investigated using MixedMode simulation. The intrinsic resistance of the device is optimised by evaluating the impact of the source/drain engineering using variation of spacers and doping profile on the RF key figures of merit such as f(T), and f(MAX). It is evident that longer spacers, which approach the length of the gate offer better RF performance irrespective of the profile as long as the doping gradient at the gate edge is <7 nm/decade. Analytical expressions, which reflect the dependence of f(T), and fMAX on extrinsic source, drain and gate resistances R-S, R-D and R-G have been derived. While R-D and R-S have equal effect on f(T), R-D appears to be more influential than R-S in reducing f(MAX). The sensitivity of f(MAX) to R-S and R-D. has been shown to be greater than to R-G. (c) 2006 Elsevier Ltd. All rights reserved.

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

In this paper, we propose for the first time, an analytical model for short channel effects in nanoscale source/drain extension region engineered double gate (DG) SOI MOSFETs. The impact of (i) lateral source/drain doping gradient (d), (ii) spacer width (s), (iii) spacer to doping gradient ratio (s/d) and (iv) silicon film thickness (T-si), on short channel effects - threshold voltage (V-th) and subthreshold slope (S), on-current (I-on), off-current (I-on) and I-on/I-off is extensively analysed by using the analytical model and 2D device simulations. The results of the analytical model confirm well with simulated data over the entire range of spacer widths, doping gradients and effective channel lengths. Results show that lateral source/drain doping gradient along with spacer width can not only effectively control short channel effects, thus presenting low off-current, but can also be optimised to achieve high values of on-currents. The present work provides valuable design insights in the performance of nanoscale DG Sol devices with optimal source/drain engineering and serves as a tool to optimise important device and technological parameters for 65 nm technology node and below. (c) 2006 Elsevier Ltd. All rights reserved.

Analog performance of double gate SOI transistors

Double gate fully depleted silicon-on-insulator (DGSOI) is recognized as a possible solution when the physical gate length L-G reduces to 25nm for the 65nm node on the ITRS CMOS roadmap. In this paper, scaling guidelines are introduced to optimally design a nanoscale DGSOI. For this reason, the sensitivity of gain, f(T) and f(max) to each of the key geometric and technological parameters of the DGSOI are assessed and quantified using MixedMode simulation. The impact of the parasitic resistance and capacitance on analog device performance is systematically analysed. By comparing analog performance with a single gate (SG), it has been found that intrinsic gain in DGSOI is 4 times higher but its fT was found to be comparable to that of SGSOI at different regions of transistor operation. However, the extracted fmax in SG SOI was higher (similar to 40%) compared to DGSOI due to its lower capacitance.

Atomic layer deposition of hafnium oxide dielectrics on silicon and germanium substrates

Hafnium oxide films have been deposited at 250 °C on silicon and germanium substrates by atomic layer deposition (ALD), using tetrakis-ethylmethylamino hafnium (TEMAH) and water vapour as precursors in a modified Oxford Instruments PECVD system. Self-limiting monolayer growth has been verified, characterised by a growth rate of 0.082 nm/ cycle. Layer uniformity is approximately within ±1% of the mean value. MOS capacitors have been fabricated by evaporating aluminium electrodes. CV analysis has been used to determine the bulk and interface properties of the HfO 2, and their dependence on pre-clean schedule, deposition conditions and post-deposition annealing. The dielectric constant of the HfO 2 is typically 18. On silicon, best results are obtained when the HfO 2 is deposited on a chemically oxidised hydrophilic surface. On germanium, best results are obtained when the substrate is nitrided before HfO 2 deposition, using an in-situ nitrogen plasma treatment. © Springer Science+Business Media, LLC 2007.

Compact Toffoli gate using weighted graph states

We introduce three compact graph states that can be used to perform a measurement-based Toffoli gate. Given a weighted graph of six, seven, or eight qubits, we show that success probabilities of 1/4, 1/2, and 1, respectively, can be achieved. Our study puts a measurement-based version of this important quantum logic gate within the reach of current experiments. As the graphs are setup independent, they could be realized in a variety of systems, including linear optics and ion traps.

Control-limited perfect state transfer, quantum stochastic resonance, and many-body entangling gate in imperfect qubit registers

We propose a protocol for perfect quantum state transfer that is resilient to a broad class of realistic experimental imperfections, including noise sources that could be modeled either as independent Markovian baths or as certain forms of spatially correlated environments. We highlight interesting connections between the fidelity of state transfer and quantum stochastic resonance effects. The scheme is flexible enough to act as an effective entangling gate for the generation of genuine multipartite entanglement in a control-limited setting. Possible experimental implementations using superconducting qubits are also briefly discussed.

Two Arginine-Glutamate Ionic Locks Near the Extracellular Surface of FFAR1 Gate Receptor Activation

Activation of a number of class A G protein-coupled receptors (GPCRs) is thought to involve two molecular switches, a rotamer toggle switch within the transmembrane domain and an ionic lock at the cytoplasmic surface of the receptor; however, the mechanism by which agonist binding changes these molecular interactions is not understood. Importantly, 80% of GPCRs including free fatty acid receptor 1 (FFAR1) lack the complement of amino acid residues implicated in either or both of these two switches; the mechanism of activation of these GPCRs is therefore less clear. By homology modeling, we identified two Glu residues (Glu-145 and Glu-172) in the second extracellular loop of FFAR1 that form putative interactions individually with two transmembrane Arg residues (Arg-183(5.39) and Arg-258(7.35)) to create two ionic locks. Molecular dynamics simulations showed that binding of agonists to FFAR1 leads to breakage of these Glu-Arg interactions. In mutagenesis experiments, breakage of these two putative interactions by substituting Ala for Glu-145 and Glu-172 caused constitutive receptor activation. Our results therefore reveal a molecular switch for receptor activation present on the extracellular surface of FFAR1 that is broken by agonist binding. Similar ionic locks between the transmembrane domains and the extracellular loops may constitute a mechanism common to other class A GPCRs also.