Properties of AlyGa1-yN/AlxGa1-xN/AlN/GaN Double-Barrier High Electron Mobility Transistor Structure

Electrical properties of AlyGa1-yN/AlxGa1-xN/AlN/GaN structure are investigated by solving coupled Schrodinger and Poisson equation self-consistently. Our calculations show that the two-dimensional electron gas (2DEG) density will decrease with the thickness of the second barrier (AlyGa1-yN) once the AlN content of the second barrier is smaller than a critical value y(c), and will increase with the thickness of the second barrier (AlyGa1-yN) when the critical AlN content of the second barrier y(c) is exceeded. Our calculations also show that the critical AlN content of the second barrier y(c) will increase with the AlN content and the thickness of the first barrier layer (AlxGa1-xN).

Zero-field spin splitting in In0.52Al0.48As/InxGa1-xAs metamorphic high-electron-mobility-transistor structures on GaAs substrates using Shubnikov-de Haas measurements

Shubnikov-de Haas measurements were carried out for In0.52Al0.48As/InxGa1-xAs metamorphic high-electron-mobility-transistor structures grown on GaAs substrates with different indium contents and/or different Si delta-doping concentrations. Zero-field (B-->0) spin splitting was found in samples with stronger conduction band bending in the InGaAs well. It was shown that the dominant spin splitting mechanism is attributed to the contribution by the Rashba term. We found that zero-field spin splitting not only occurs in the ground electron subband, but also in the first excited electron subband for a sample with Si delta-doping concentration of 6x10(12) cm(-2). We propose that this In0.52Al0.48As/InxGa1-xAs metamorphic high-electron-mobility-transistor structure grown on GaAs may be a promising candidate spin-polarized field-effect transistors. (C) 2002 American Institute of Physics.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

Single-electron multiple-valued memory using ultra-small floating gate metal-oxide-semiconductor field effect transistor

This paper proposes a novel single-electron multiple-valued memory. It is a metal-oxide-semiconductor field effect transistor (MOS)-type memory with multiple separate control gates and floating gate layer, which consists of nano-crystal grains. The electron can tunnel among the grains (floating gates) and between the floating gate layer and the MOS channel. The memory can realize operations of 'write', 'store' and 'erase' of multiple-valued signals exceeding three values by controlling the single electron tunneling behavior. We use Monte Carlo method to simulate the operation of single-electron four-valued memory. The simulation results show that it can operate well at room temperature.

AlGaN/AlN/GaN/SiC HEMT structure with high mobility GaN thin layer as channel grown by MOCVD

Enhancement of the electrical properties in an AlGaN/GaN high electron mobility transistor (HEMT) structures was demonstrated by employing the combination of a high mobility GaN channel layer and an AlN interlayer. The structures were grown on 50 mm semi-insulating (SI) 6H-SiC substrates by metalorganic chemical vapor deposition (MOCVD). The room temperature (RT) two-dimensional electron gas (2DEG) mobility was as high as 2215 cm(2)/V s, with a 2DEG concentration of 1.044 x 10(13)cm(-2). The 50 mm HEMT wafer exhibited a low average sheet resistance of 251.0 Omega/square, with a resistance uniformity of 2.02%. The 0.35 Pin gate length HEMT devices based on this material structure, exhibited a maximum drain current density of 1300 mA/mm, a maximum extrinsic transconductance of 314 mS/mm, a current gain cut-off frequency of 28 GHz and a maximum oscillation frequency of 60 GHz. The maximum output power density of 4.10 W/mm was achieved at 8 GHz, with a power gain of 6.13 dB and a power added efficiency (PAE) of 33.6%. (c) 2006 Elsevier B.V. All rights reserved.

Semiconductor optical amplifier optical gate with graded strained bulk-like active structure

A novel semiconductor optical amplifier (SOA) optical gate with a graded strained bulk-like active structure is proposed. A fiber-to-fiber gain of 10 dB when the coupling loss reaches 7 dB/factet and a polarization insensitivity of less than 0.9 dB for multiwavelength and different power input signals over the whole operation current are obtained. Moreover, for our SOA optical gate, a no-loss current of 50 to 70 mA and an extinction ratio of more than 50 dB are realized when the injection current is more than no-loss current, and the maximum extinction ratio reaches 71 dB, which is critical for crosstalk suppression. (C) 2003 society of Photo-Optical Instrumentation Engineers.

MOCVD-Grown AlGaN/AlN/GaN HEMT Structure with High Mobility GaN Thin Layer as Channel on SiC

AlGaN/AlN/GaN high electron mobility transistor (HEMT) structures with a high-mobility GaN thin layer as a channel are grown on high resistive 6H-SiC substrates by metalorganic chemical vapor deposition. The HEMT structure exhibits a typical two-dimensional electron gas (2DEG) mobility of 1944cm2/(V · s) at room temperature and 11588cm2/(V· s) at 80K with almost equal 2DEG concentrations of about 1.03 × 1013 cm-2 High crystal quality of the HEMT structures is confirmed by triple-crystal X-ray diffraction analysis. Atomic force microscopy measurements reveal a smooth AlGaN surface with a root-mean-square roughness of 0. 27nm for a scan area of 10μm × 10μm. HEMT devices with 0.8μm gate length and 1.2mm gate width are fabricated using the structures. A maximum drain current density of 957mA/mm and an extrinsic transconductance of 267mS/mm are obtained.

Observation of N-Shaped Negative Differential Resistance in GaAs-Based Modulation-Doped Field Effect Transistor with InAs Quantum Dots

N-shaped negative differential resistance (NDR) with a high peak-to-valley ratio (PVR) is observed in a GaAs-based modulation-doped field effect transistor (MODFET) with InAs quantum dots (QDs) in the barrier layer (QDFET) compared with a GaAs MODFET. The NDR is explained as the real-space transfer (RST) of high-mobility electrons in a channel into nearby barrier layers with low mobility, and the PVR is enhanced dramatically upon inserting the QD layer. It is also revealed that the QD layer traps holes and acts as a positively charged nano-floating gate after a brief optical illumination, while it acts as a negatively charged nano-floating gate and depletes the adjacent channel when charged by the electrons. The NDR suggests a promising application in memory or high-speed logic devices for the QDFET structure.

Organic Thin-Film Transistor Memory With Nanoparticle Floating Gate

Organic thin-film transistor memory devices were realized by inserting a layer of nanoparticles (such as Ag or CaF2) between two Nylon 6 gate dielectrics as the floating gate. The transistor memories were fabricated on glass substrates by full thermal deposition. The transistors exhibit significant hysteresis behavior in current-voltage characteristics, due to the separated Ag or CaF2 nanoparticle islands that act as charge trap centers. The mechanism of the transistor memory operation was discussed.

A novel structure analysis method for lanthanide complex - None paramagnetic shift tri-lanthanide mixture method

A new structure analysis method for lanthanide complexes was proposed, that is, none paramagnetic shift tri-lanthanide mixture method, It was found that the paramagnetic induced shift could be cancelled by mixing three kinds of paramagnetic lanthanide ions in appropriate proportion. As a result, the chelating sites would he seen simplely from the half widths and the relative distances between lanthanide ion and the ligand nucleus could be calculated from the relaxation time (T-1) or the half width. Care should be addressed that the analysis method is suitable for the systems in which intramolecular arrangements and intermolecular ligand exchanges are relatively fasten NMR time scale used.

Properties of high k gate dielectric gadolinium oxide deposited on Si(100) by dual ion beam deposition (DIBD)

Gadolinium oxide thin films have been prepared on silicon (100) substrates with a low-energy dual ion-beam epitaxial technique. Substrate temperature was an important factor to affect the crystal structures and textures in an ion energy range of 100-500 eV. The films had a monoclinic Gd2O3 structure with preferred orientation ((4) over bar 02) at low substrate temperatures. When the substrate temperature was increased, the orientation turned to (202), and finally, the cubic structure appeared at the substrate temperature of 700 degreesC, which disagreed with the previous report because of the ion energy. The AES studies found that Gadolinium oxide shared Gd2O3 structures, although there were a lot of oxygen deficiencies in the films, and the XPS results confirmed this. AFM was also used to investigate the surface images of the samples. Finally, the electrical properties were presented. (C) 2004 Elsevier B.V. All rights reserved.

The relation between translation speed and protein secondary structure

Based on the statistical analysis of 119 human and 92 E. coli proteins it was found that for both human and E. coli, the mRNA sequences consisting of tri-codon and tetra-codon with high translation speed preferably code for alpha helices more than for coils. For beta strand, the preference/ avoidance oscillates with the translation speed. Moreover, the non-homogeneous usages of tri-codon and tetra-codon with different translation speeds in a given secondary structure have also been found. These results cannot be simply explained by the effect of stochastic fluctuation.

Multiple valley couplings in nanometer Si metal-oxide-semiconductor field-effect transistors

We investigate the couplings between different energy band valleys in a metal-oxide-semiconductor field-effect transistor (MOSFET) device using self-consistent calculations of million-atom Schrodinger-Poisson equations. Atomistic empirical pseudopotentials are used to describe the device Hamiltonian and the underlying bulk band structure. The MOSFET device is under nonequilibrium condition with a source-drain bias up to 2 V and a gate potential close to the threshold potential. We find that all the intervalley couplings are small, with the coupling constants less than 3 meV. As a result, the system eigenstates derived from different bulk valleys can be calculated separately. This will significantly reduce the simulation time because the diagonalization of the Hamiltonian matrix scales as the third power of the total number of basis functions. (C) 2008 American Institute of Physics.

Influence of V/III ratio on the structural and photoluminescence properties of In0.52AlAs/In0.53GaAs metamorphic high electron mobility transistor grown by molecular beam epitaxy

A series of metamorphic high electron mobility transistors (MMHEMTs) with different V/III flux ratios are grown on GaAs (001) substrates by molecular beam epitaxy (XIBE). The samples are analysed by using atomic force microscopy (AFM), Hall measurement, and low temperature photoluminescence (PL). The optimum V/III ratio in a range from 15 to 60 for the growth of MMHEMTs is found to be around 40. At this ratio, the root mean square (RMS) roughness of the material is only 2.02 nm; a room-temperature mobility and a sheet electron density are obtained to be 10610.0cm(2)/(V.s) and 3.26 x 10(12)cm(-2) respectively. These results are equivalent to those obtained for the same structure grown on InP substrate. There are two peaks in the PL spectrum of the structure, corresponding to two sub-energy levels of the In0.53Ga0.47 As quantum well. It is found that the photoluminescence intensities of the two peaks vary with the V/III ratio, for which the reasons are discussed.

Quantum mechanical simulation of nanosized metal-oxide-semiconductor field-effect transistor using empirical pseudopotentials: A comparison for charge density occupation methods

The atomistic pseudopotential quantum mechanical calculations are used to study the transport in million atom nanosized metal-oxide-semiconductor field-effect transistors. In the charge self-consistent calculation, the quantum mechanical eigenstates of closed systems instead of scattering states of open systems are calculated. The question of how to use these eigenstates to simulate a nonequilibrium system, and how to calculate the electric currents, is addressed. Two methods to occupy the electron eigenstates to yield the charge density in a nonequilibrium condition are tested and compared. One is a partition method and another is a quasi-Fermi level method. Two methods are also used to evaluate the current: one uses the ballistic and tunneling current approximation, another uses the drift-diffusion method. (C) 2009 American Institute of Physics. [doi:10.1063/1.3248262]