Monostable-Bistable Transition Logic Element (MOBILE) Model for Single-Electron Transistors

The traditional monostable-bistable transition logic element (MOBILE) structure is usually composed of resonant tunneling diodes (RTD). This letter describes a new type MOBILE structure consisting of single-electron transistors (i.e. SET-MOBILE). The analytical model of single-electron transistors ( SET) has been considered three states (including an excited state) of the discrete quantum energy levels. The simulation results show negative differential conductance (NDC) characteristics in I-DS-V-DS curve. The SET-MOBILE utilizing NDC characteristics can successfully realize the basic logic functions as the RTD-MOBILE.

Smart universal multiple-valued logic gates by transferring single electrons

This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

Compact non-binary fast adders using single-electron devices

This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders. (C) 2009 Elsevier Ltd. All rights reserved.

Dephasing rate in an InAs/GaAs single-electron quantum dot qubit

We have obtained the parameter-phase diagram, which unambiguously defines the parameter region for the use of InAs/GaAs quantum dot as two-level quantum system in quantum computation in the framework of the effective-mass envelope function theory. Moreover, static electric field is found to efficiently prolong decoherence time. As a result, decoherence time may reach the order of magnitude of milli-seconds as external static electric field goes beyond 20 kV/cm if only vacuum fluctuation is taken as the main source for decoherence. Our calculated results are useful for guiding the solid-state implementation of quantum computing.

InAs/GaAs single-electron quantum dot qubit

The time evolution of the quantum mechanical state of an electron is calculated in the framework of the effective-mass envelope function theory for an InAs/GaAs quantum dot. The results indicate that the superposition state electron density oscillates in the quantum dot, with a period on the order of femtoseconds. The interaction energy E-ij between two electrons located in different quantum dots is calculated for one electron in the ith pure quantum state and another in the jth pure quantum state. We find that E-11]E-12]E-22, and E-ij decreases as the distance between the two quantum dots increases. We present a parameter-phase diagram which defines the parameter region for the use of an InAs/GaAs quantum dot as a two-level quantum system in quantum computation. A static electric field is found to efficiently prolong the decoherence time. Our results should be useful for designing the solid-state implementation of quantum computing. (C) 2001 American Institute of Physics.

Single-electron tunneling depressing synapse for cellular neural networks

In this paper, a cellular neural network with depressing synapses for contrast-invariant pattern classification and synchrony detection is presented, starting from the impulse model of the single-electron tunneling junction. The results of the impulse model and the network are simulated using simulation program with integrated circuit emphasis (SPICE). It is demonstrated that depressing synapses should be an important candidate of robust systems since they exhibit a rapid depression of excitatory postsynaptic potentials for successive presynaptic spikes.

Single-electron multiple-valued memory using ultra-small floating gate metal-oxide-semiconductor field effect transistor

This paper proposes a novel single-electron multiple-valued memory. It is a metal-oxide-semiconductor field effect transistor (MOS)-type memory with multiple separate control gates and floating gate layer, which consists of nano-crystal grains. The electron can tunnel among the grains (floating gates) and between the floating gate layer and the MOS channel. The memory can realize operations of 'write', 'store' and 'erase' of multiple-valued signals exceeding three values by controlling the single electron tunneling behavior. We use Monte Carlo method to simulate the operation of single-electron four-valued memory. The simulation results show that it can operate well at room temperature.

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

Measurement of single electron spin with submicron Hall magnetometer

Submicron Hall magnetometry has been demonstrated as an efficient technique to probe extremely weak magnetic fields. In this letter, we analyze the possibility of employing it to detect single electron spin. Signal strength and readout time are estimated and discussed with respect to a number of practical issues. (C) 2005 American Institute of Physics.

A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors

This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid phase-frequency detector (PFD) circuit and a SE turnstile/MOS hybrid frequency divider. The phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. We propose a SPICE model to describe the behavior of the MOSFET-based SE turnstile. The authors simulate the performance of the PILL block circuits and the whole PLL synthesizer. Simulation results indicated that the circuit can well perform the operation of the PLL frequency synthesizer at room temperature. The PILL synthesizer is very compact. The total number of the transistors is less than 50. The power dissipation of the proposed PLL circuit is less than 3 uW. The authors discuss the effect of fabrication tolerance, the effect of background charge and the SE transfer accuracy on the performance of the PLL circuit. A technique to compensate parameter dispersions of SEDs is proposed.

Quantum measurement characteristics of a double-dot single electron transistor

Owing to a few unique advantages, the double-dot single electron transistor has been proposed as an alternative detector for charge states. In this work, we present a further study for its signal-to-noise property, based on a full analysis of the setup configuration symmetry. It is found that the effectiveness of the double-dot detector can approach that of an ideal detector, if the symmetric capacitive coupling is taken into account. The quantum measurement efficiency is also analyzed by comparing the measurement time with the measurement-induced dephasing time.

Novel hybrid voltage controlled ring oscillators using single electron and MOS transistors

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

Optical manipulation of single electron spin in doped and undoped quantum dots

The optical manipulation of electron spins is of great benefit to solid-state quantum information processing. In this letter, we provide a comparative study on the ultrafast optical manipulation of single electron spin in the doped and undoped quantum dots. The study indicates that the experimental breakthrough can be preliminarily made in the undoped quantum dots, because of the relatively less demand.

Quantum measurement of single electron state by a quantum point contact

Closely related to the quantum information processing in solid states, we study the quantum measurement of single electron state by a mesoscopic charge-sensitive detector, namely the quantum point contact (QPC). We find that the conventional Lindblad-type master equation is not appropriate for describing the underlying measurement dynamics. The treatment developed in this work properly accounts for the energy-exchange between the detector and the measured system, and its role on the detailed-balance relation. A valid description for the QPC measurement dynamics is provided which may have impact on the study of quantum measurement and quantum feedback control in solid states.

Quantum trajectory analysis for electrical detection of single-electron spin resonance

A Monte Carlo simulation on the basis of quantum trajectory approach is carried out for the measurement dynamics of a single-electron spin resonance. The measured electron, which is confined in either a quantum dot or a defect trap, is tunnel coupled to a side reservoir and continuously monitored by a mesoscopic detector. The simulation not only recovers the observed telegraphic signal of detector current, but also predicts unique features in the output power spectrum which are associated with electron dynamics in different regimes.