On the performance analysis and design of a novel shared-layer integrated devices using RCE-p-i-n-PD/SHBT - art. no. 67820J

We have explored the shared-layer integration fabrication of an resonant-cavity-enhanced p-i-n photodector (RCE- p-i-n-PD) and a single heterojunction bipolar transistor (SHBT) with the same epitaxy grown layer structure. MOCVD growth of the different layer structure for the GaAs based RCE- p-i-n-PD/SHBT require compromises to obtain the best performance of the integrated devices. The SHBT is proposed with super-lattice in the collector, and the structure of the base and the collector of the SHBT is used for the RCE. Up to now, the DC characteristics of the integrated device have been obtained.

Design and performance of monolithic integrated electro-absorption modulated distributed feedback laser - art. no. 67820Y

High performance InGaAsP/InGaAsP strained compensated multiple-quantum-well (MQW) electroabsorption modulators (EAM) monolithically integrated with a DFB laser diode have been designed and realized by ultra low metal-organic vapor phase epitaxy (MOVPE) based on a novel butt joint scheme. The optimization thickness of upper SCH layer for DFB and EAM was obtained of the proposed MQW structure of the EAM through numerical simulation and experiment. The device containing 250(mu m) DFB and 170(mu m) EAM shows good material quality and exhibits a threshold current of 17mA, an extinction ratio of higher than 30 dB and a very high modulation efficiency (12dB/V) from 0V to 1V. By adopting a high-mesa ridge waveguide and buried polyimide, the capacitance of the modulator is reduced to about 0.30 pF corresponding to a 3dB bandwidth more than 20GHz.

Design considerations for a silicon-based p-i-n phase modulator in a double ridge waveguide with side isolating grooves

We present detail design considerations and simulation results of a forward biased carrier injection p-i-n modulator integrated on SOI rib waveguides. To minimize the free carrier absorption loss while keeping the comparatively small lateral dimensions of the modulator as required for high speed operation, we proposed two structural improvements, namely the double ridge (terrace ridge) structure and the isolating grooves at both sides of the double ridge. With improved carrier injection and optical confinement structure, the simulated modulator response time is in sub-ns range and absorption loss is minimized.

Low Power Integrated Circuits for Wireless Neural Recording Applications

A group of prototype integrated circuits are presented for a wireless neural recording micro-system. An inductive link was built for transcutaneous wireless power transfer and data transmission. Power and data were transmitted by a pair of coils on a same carrier frequency. The integrated receiver circuitry was composed of a full-wave bridge rectifier, a voltage regulator, a date recovery circuit, a clock recovery circuit and a power detector. The amplifiers were designed with a limited bandwidth for neural signals acquisition. An integrated FM transmitter was used to transmit the extracted neural signals to external equipments. 16.5 mW power and 50 bps - 2.5 Kbps command data can be received over 1 MHz carrier within 10 mm. The total gain of 60 dB was obtained by the preamplifier and a main amplifier at 0.95Hz - 13.41 KHz with 0.215 mW power dissipation. The power consumption of the 100 MHz ASK transmitter is 0.374 mW. All the integrated circuits operated under a 3.3 V power supply except the voltage regulator.

SOI submicron rib waveguides: Design, Fabrication and Characterization

We present detailed design, fabrication, and characterization issues of submicron rib waveguides based on silicon-on-insulator. The waveguides fabricated by EBL and ICP processes have propagation loss of 1.8dB/mm and bend loss of 0.14dB/90 degrees for bends with radius of 5 mu m.

Low threading-dislocation-density Ge film on Si grown on a pitting Ge buffer layer

A Ge layer with a pitting surface can be obtained when the growth temperature is lowered to 290 degrees C. On the low temperature Ge buffer layer with pits, high quality Ge layer was grown at 600 degrees C with a threading dislocation density of similar to 1x10(5)cm(-2). According to channeling and random Rutherford backscattering spectrometry spectra, a chi(min) value of 10% and 3.9% was found, respectively, at the Ge/Si interface and immediately under the surface peak. The root-mean-square surface roughness of Ge film was 0.33nm.

Characteristics of SOI rib waveguide microring and racetrack resonators

Characteristics of microring/racetrack resonators, in submicron SOI rib waveguides, have been investigated. The effects of waveguide dimensions, coupler design, roughness, and oxide cladding are considered. Moreover, guided mode, loss and dispersion of such waveguides are analyzed.

Theoretical and Experimental Studies of an Ultra-compact Photonic Crystal Corner Mirror Based on Silicon-On-Insulator

An ultra-compact silicon-on-insulator based photonic crystal corner mirror is designed and optimized. A sample is then successfully fabricated with extra losses 1.1 +/- 0.4dB for transverse-electronic (M) polarization for wavelength range of 1510-1630nm.

Fabrication and characterization of two-dimensional photonic crystal on silicon by efficient methods

Two-dimensional photonic crystals working in near infrared region are fabricated into silicon-on-insulator wafer by 248-nm deep UV lithography. We present an efficient way to measure the photonic crystal waveguide's light transmission spectra at given polarization states.

Photoluminescence mechanism of Si nanocrystals embedded in SiO2 matrix

The interface state recombination effect from the quantum confinement effect in PL signals from the SRO material system was studied. The results show that the larger the size of Si NCs, the more beneficial for the interface state recombination process to surpass the quantum confinement process, in support of Qin's model.

SHicon-based resonant-cavity-enhanced photodetectors

Silicon-based resonant-cavity-enhanced photodetectors (RCE-PD) with Si, Ge islands and InGaAs as absorption materials were introduced, respectively. The Ge islands and Si RCE-PD had a membrane structure and the Si-based InGaAs RCE-PDs were fabricated by bonding technology.

A low power integrated CMOS transmitter for BCI system

The prototype wafer of a low power integrated CMOS Transmitter for short-range biotelemetry application has been designed and fabricated, which is prospective to be implanted in the human brain to transfer the extracted neural information to the external computer. The transmitter consists of five parts, a bandgap current regulator, a ring oscillator, a buffer, a modulator and a power transistor. High integration and low power are the most distinct criteria for such an implantable integrated circuit. The post-simulation results show that under a 3.3 V power supply the transmitter provides 100.1 MHz half-wave sinusoid current signal to drive the off-chip antenna, the output peak current range is -0.155 mA similar to 1.250 mA, and on-chip static power dissipation is low to 0.374 mW. All the performances of the transmitter satisfy the demands of wireless real-time BCI system for neural signals recording and processing.

Simulation of a monolithically integrated CMOS bioamplifier for EEG recordings

A monolithically integrated CMOS bioamplifier is presented in this paper for EEG recording applications. The capacitive-coupled circuit input structure is utilized to eliminate the large and random DC offsets existing in the electrode-tissue interface. Diode-connected NMOS transistors with negative voltage between gate and source are candidates for large resistors necessary to the bioamplifier. A passive BEF (Band Eliminator Filter) can reduce 50 Hz noise disturbance strength by more than 60 dB. A novel analysis approach is given to help determine the noise power spectral density. Simulation results show that the two-stage CMOS bioamplifier in a closed-loop capacitive feedback configuration,provides an AC in-band gain of 39.6 dB, a DC gain of zero, and an input-referred noise of 87 nVrms integrated from 0.01 Hz to 100 Hz.

On the design and simulation of high speed electro-optic modulator based on SOI waveguide MOS dual capacitor structure

zhangdi于2010-03-29批量导入

SOI-based thermo-optic waveguide switch matrix with spot size converters

A SOI-based thermo-optic waveguide switch matrix worked at 1.55 mu m, integrated with spot size converters is designed and fabricated for the first time. The insertion loss and polarization dependent loss are less than 13dB and 2dB, respectively. The extinction ratio is larger than 19dB. The response time is less than 5 mu s and the power consumption of the switch cell is about 200mW.