229 resultados para Mott Insulator


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SOI(Silicon-on-Insulator)光电子集成已成为十分引人注目的研究课题,其工艺与CMOS工艺完全兼容,可以实现低成本的SOI基整片集成光电子回路。本文综述了近几年来SOI集成光电子器件的发展以及一些最新的研究进展,着重分析几种最新型光无源器件的工作原理和结构,包括SOI光波导、SOI光波导耦合器、SOI光波导开关、相位阵列波导光栅(PAWG)、基于SOI的光探测器等,并介绍了中国科学院半导体所集成光电子国家重点实验室的研究进展。

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分析了SOI(silicon-on-insulator)2×2电光开关工作时热光效应对等离子色散效应的影响。采用二维半导器件模拟器PISCES-Ⅱ对器件进行模块。结果表明,热光效应对等离子色散效应的影响与调制区长度密切相关,当调制区长度较短时,热光效应的影响不容忽视;当调制区长度大于500μm时,这种影响可以忽略不计

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The temperature dependence of characteristics for multimode interference (MMI) based 3-dB coupler in silicon-on-insulator is analyzed, which originates from the relatively high thermo-optic coefficient of silicon. For restricted interference 3-dB MMI coupler, the output power uniformity is ideally 0 at room temperature and becomes 0. 32 dB when temperature rises up to 550 K. For symmetric interference 3-dB MMI coupler, the power uniformity keeps ideally 0 due to its intrinsic symmetric interference mechanism. With the temperature rising, the excess loss of the both devices increases. The performance deterioration due to temperature variety is more obvious to restricted interference MMI 3-dB coupler, comparing with that of symmetric interference MMI 3-dB coupler.

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研究了基于SOI(silicon-on-insulator)材料的阵列波导光栅(AWG)分波器件,给出了此器件材料色散的数值拟合公式,进而利用BPM方法研究了材料色散脊型波导结构变化和器件制做中刻蚀深度误差对波导有效折射率和波分复用模块性能的影响。结果表明,刻蚀深度误差对模块性能优劣起关键作用。

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在超紧缩双曲锥形3 dB多模干涉耦合器的基础上,设计了一种新的Silicon-on-insulator (SOI) Mach-Zehnder干涉型电光调制器。与传统的Y分支器相比,双曲锥形3 dB耦合器的制作容差大,而长度缩短了近30%,使得整个器件的尺寸大幅减小。调制区采用横向注入的PIN结构,模拟结果表明

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给出了Y分支MZI热光调制器的模型,实验研制了基于SOI(silicon-on-insulator)的MZI热光调制器,调制器的消光比为16.5dB,开关的上升时间为10μs,下降时间为20μs,相应的功耗为0.39W

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Silicon-on-insulator (SOI)集成光电子器件的工艺与标准CMOS工艺完全兼容,采用SOI技术可以实现低成本的整片集成光电子回路。文章回顾了近几年来SOI集成光电子器件的发展以及一些最新的研究进展。

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MMI (multimode interference) coupler, modulator and switch based on SOI (silicon- on-insulator) have been become more and more attractive in optical systems since they show important performances. SiO2 thin cladding layers (<1.0mum) can be used in SOI waveguide due to the large index step between Si and SiO2, making them compatible with the VLSI technology. The design and fabrication of multimode interference (MMI) optical coupler, modulator and switche in SOI technology are presented in the paper. The results demonstrated that the modulator has an extinction ratio of -11.0dB and excess loss of -2.5dB, while the optical switch has a crosstalk of -12.5dB and responding time of less than 20 mus.

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The development of optical network demands integrated arid multiple functionality modules to lowing cost and acquire highly reliability. Among the various contender materials to be photonic integrated circuits platform, silicon exhibits dominant characteristics and is the most promising platform materials. The paper compares the characteristics of some candidate materials with silicon and reviews recent progress in silicon based photonic integration technology. Tile challenges to silicon for optical integration for optical networking application arc also indicated.

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We designed and fabricated GaAs OMIST (Optical-controlled Metal-Insulator-Semiconductor Thyristor) device. Using oxidation of A1As layer that is grown by MBE form the Ultra-Thin semi-Insulating layer (UTI) of the GAAS OMIST. The accurate control and formation of high quality semi-insulating layer (AlxOy) are the key processes for fabricating GaAs OMIST. The device exhibits a current-controlled negative resistance region in its I-V characteristics. When illuminated, the major effect of optical excitation is the reduction of the switching voltage. If the GaAs OMIST device is biased at a voltage below its dark switching voltage V-s, sufficient incident light can switch OMIST from high impedance low current"off"state to low impedance high current "on"state. The absorbing material of OMIST is GaAs, so if the wavelength of incident light within 600 similar to 850nm can be detected effectively. It is suitable to be used as photodetector for digital optical data process. The other attractive features of GaAs OMIST device include suitable conducted current, switching voltage and power levels for OEIC, high switch speed and high sensitivity to light or current injection.

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Si1-xGex/Si optoelectronic devices are promising for the monolithic integration with silicon-based microelectronics. SiGe/Si MQW RCE-PD (Resonant-Cavity-Enhanced photodiodes) with different structures were investigated in this work. Design and fabrication of top- and bottom-incident RCE-PD, such as growth of SiGe MQW (Multiple Quantum Wells) on Si and SOI (Si on insulator) wafers, bonding between SiGe epitaxial wafer and SOR (Surface Optical Reflector) consisting Of SiO2/Si DBR (Distributed Bragg Reflector) films on Si, and performances of RCE-PD, were presented. The responsivity of 44mA/W at 1.314 mum and the FWHM of 6nm were obtained at bias of 10V. The highest external quantum efficiency measured in the investigation is 4.2%.

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In this paper, we report the fabrication of Si-based double hetero-epitaxial SOI materials Si/gamma-Al2O3/Si. First, single crystalline gamma-Al2O3 (100) insulator films were grown epitaxially on Si(100) by LPCVD, and then, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a CVD method similar to silicon on sapphire (SOS) epitaxial growth. The Si/gamma-Al2O3 (100)/Si(100) SOI materials are characterized in detail by RHEED, XRD and AES techniques. The results demonstrate that the device-quality novel SOI materials Si/gamma-Al2O3 (100)/Si(100) has been fabricated successfully and can be used for application of MOS device.

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SOI based wrap-gate silicon nanowire FETs are fabricated through electron beam lithography and wet etching. Dry thermal oxidation is used to further reduce the patterned fins cross section and transfer them into nanowires. Silicon nanowire FETs with different nanowire widths varying from 60 nm to 200 nm are fabricated and the number of the nanowires contained in a channel is also varied. The on-current (I-ON) and off-current (I-OFF) of the fabricated silicon nanowire FET are 0.59 mu A and 0.19 nA respectively. The subthreshold swing (SS) and the drain induced barrier lowering are 580 mV/dec and 149 mVN respectively due to the 30 nm thick gate oxide and 1015 cm(-3) lightly doped silicon nanowire channel. The nanowire width dependence of SS is shown and attributed to the fact that the side-gate parts of a wrap gate play a more effectual role as the nanowires in a channel get narrower. It seems the nanowire number in a channel has no effect on SS because the side-gate parts fill in the space between two adjacent nanowires.

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The extraordinary transmission of the subwavelength gold grating has been investigated by the rigorous coupled-wave analysis and verified by the metal-insulator-metal plasmonic waveguide method. The physical mechanisms of the extraordinary transmission are characterized as the excitation of the surface plasmon polariton modes. The subwavelength grating integrated with the distributed Bragg reflector is proposed to modulate the phase to realize spatial mode selection, which is prospected to be applied for transverse mode selection in the vertical cavity surface-emitting laser.

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对氦(He)离子高温(600K)注入6H-SiC中的辐照缺陷,在阶梯温度退火后演化行为的拉曼光谱和室温光致发光谱的特征进行了分析.这两种方法的实验结果表明,离子注入所产生晶格损伤的程度与注入剂量有关;高温退火导致损伤的恢复,不同注入剂量造成的晶格损伤需要不同的退火温度才可恢复.在阶梯温度退火下呈现出了点缺陷的复合、氦-空位团的产生、氦泡的形核、长大等特性.研究表明:高温(600K)注入在一定剂量范围内是避免注入层非晶化的一个重要方法,为后续利用氦离子注入空腔掩埋层吸杂或者制备低成本、低缺陷密度的绝缘层上碳化硅(SiCOI)材料提供了可能.