Ultra-flexible nonvolatile memory based on donor-acceptor diketopyrrolopyrrole polymer blends

Flexible memory cell array based on high mobility donor-acceptor diketopyrrolopyrrole polymer has been demonstrated. The memory cell exhibits low read voltage, high cell-to-cell uniformity and good mechanical flexibility, and has reliable retention and endurance memory performance. The electrical properties of the memory devices are systematically investigated and modeled. Our results suggest that the polymer blends provide an important step towards high-density flexible nonvolatile memory devices.

Novel nonvolatile memory with multibit storage based on a ZnO nanowire transistor.

We demonstrate a room temperature processed ferroelectric (FE) nonvolatile memory based on a ZnO nanowire (NW) FET where the NW channel is coated with FE nanoparticles. A single device exhibits excellent memory characteristics with the large modulation in channel conductance between ON and OFF states exceeding 10(4), a long retention time of over 4 × 10(4) s, and multibit memory storage ability. Our findings provide a viable way to create new functional high-density nonvolatile memory devices compatible with simple processing techniques at low temperature for flexible devices made on plastic substrates.

Nonvolatile memory functionality of ZnO nanowire transistors controlled by mobile protons.

We demonstrated the nonvolatile memory functionality of ZnO nanowire field effect transistors (FETs) using mobile protons that are generated by high-pressure hydrogen annealing (HPHA) at relatively low temperature (400 °C). These ZnO nanowire devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We show that the memory characteristics are attributed to the movement of protons between the Si/SiO(2) interface and the SiO(2)/ZnO nanowire interface by the applied gate electric field. The memory mechanism is explained in terms of the tuning of interface properties, such as effective electric field, surface charge density, and surface barrier potential due to the movement of protons in the SiO(2) layer, consistent with the UV photoresponse characteristics of nanowire memory devices. Our study will further provide a useful route of creating memory functionality and incorporating proton-based storage elements onto a modified CMOS platform for FET memory devices using nanomaterials.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

Nonvolatile memory devices based on gold nanoparticle and poly (N-Vinylcarbazole) composite

A rewritable polymer memory device based on gold nanoparticle doped poly (N-vinylcarbazole) (PVK), which can be easily fabricated by simple spin coating, has been described. An electrical bistable phenomenon is observed in the current-voltage characteristics of this device, and it is found that the electrical bistability is repeatable by proper writing voltage and erasing voltage. The unique behavior of the devices provides an interesting approach such that doping nanoparticles in polymer can be used to realize high performance nanovolatile polymer memory devices.

The morphology control of pentacene for write-once-read-many-times memory devices

We realized write-once-read-many-times (WORM) memory devices based on pentacene and demonstrated that the morphology control of the vacuum deposited pentacene thin film is greatly important for achieving the unique nonvolatile memory properties. The resulted memory devices show a high ON/OFF current ratio (10(4)), long retention time (over 12 h), and good storage stability (over 240 h). The reduction of the barrier height caused by a large interface dipole and the damage of the interface dipole under a critical bias voltage have been used to explain the transition processes.

Memory devices based on lanthanide (SM3+, EU3+, Gd3+) complexes

Memory effects in single-layer organic light-emitting devices based on Sm3+, Gd3+, and Eu3+ rare earth complexes were realized. The device structure was indium-tin-oxide (ITO)/3,4-poly(ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT)/Poly(N-vinyl carbazole) (PVK): rare earth complex/LiF/Ca/Ag. It was found experimentally that all the devices exhibited two distinctive bistable conductivity states in current-voltage characteristics by applying negative starting voltage, and more than 10(6) write-read-erase-reread cycles were achieved without degradation. Our results indicate that the rare earth organic complexes are promising materials for high-density, low-cost memory application besides the potential application as organic light-emitting materials in display devices.

Negative differential resistance and multilevel memory effects in organic devices

Negative differential resistance ( NDR) and multilevel memory effects were obtained in organic devices consisting of an anthracene derivative, 9,10-bis-{ 9,9-di-[ 4-(phenyl-p-tolyl-amino)-phenyl]-9H-fluoren-2-yl}-anthracene ( DAFA), sandwiched between Ag and ITO electrodes. The application of a negative bias voltage leads to negative differential resistance in current-voltage characteristics and different negative voltages produce different conductance currents, resulting in the multilevel memory capability of the devices. The NDR property has been attributed to charge trapping at the DAFA/Ag interface. This opens up a wide range of application possibilities of such organic-based NDR devices in memory and logic circuits.

On The Energy-Efficiency of Byte-Addressable Non-Volatile Memory

Non-Volatile Memory (NVM) technology holds promise to replace SRAM and DRAM at various levels of the memory hierarchy. The interest in NVM is motivated by the difficulty faced in scaling DRAM beyond 22 nm and, long-term, lower cost per bit. While offering higher density and negligible static power (leakage and refresh), NVM suffers increased latency and energy per memory access. This paper develops energy and performance models of memory systems and applies them to understand the energy-efficiency of replacing or complementing DRAM with NVM. Our analysis focusses on the application of NVM in main memory. We demonstrate that NVM such as STT-RAM and RRAM is energy-efficient for memory sizes commonly employed in servers and high-end workstations, but PCM is not. Furthermore, the model is well suited to quickly evaluate the impact of changes to the model parameters, which may be achieved through optimization of the memory architecture, and to determine the key parameters that impact system-level energy and performance.

Catalyst-free plasma enhanced growth of graphene from sustainable sources

Details of a fast and sustainable bottom-up process to grow large area high quality graphene films without the aid of any catalyst are reported in this paper. We used Melaleuca alternifolia, a volatile natural extract from tea tree plant as the precursor. The as-fabricated graphene films yielded a stable contact angle of 135°, indicating their potential application in very high hydrophobic coatings. The electronic devices formed by sandwiching pentacene between graphene and aluminum films demonstrated memristive behavior, and hence, these graphene films could find use in nonvolatile memory devices also.

Unexpected controllable pair-structure in ferroelectric nanodomains.

The imminent inability of silicon-based memory devices to satisfy Moore's Law is approaching rapidly. Controllable nanodomains of ferroic systems are anticipated to enable future high-density nonvolatile memory and novel electronic devices. We find via piezoresponse force microscopy (PFM) studies on lead zirconate titanate (PZT) films an unexpected nanostructuring of ferroelectric-ferroelastic domains. These consist of c-nanodomains within a-nanodomains in proximity to a-nanodomains within c-domains. These structures are created and annihilated as pairs, controllably. We treat these as a new kind of vertex-antivertex pair and consider them in terms of the Srolovitz-Scott 4-state Potts model, which results in pairwise domain vertex instabilities that resemble the vortex-antivortex mechanism in ferromagnetism, as well as dislocation pairs (or disclination pairs) that are well-known in nematic liquid crystals. Finally, we show that these nanopairs can be scaled up to form arrays that are engineered at will, paving the way toward facilitating them to real technologies.

Nucleation, growth, and control of ferroelectric-ferroelastic domains in thin polycrystalline films

The unique response of ferroic materials to external excitations facilitates them for diverse technologies, such as nonvolatile memory devices. The primary driving force behind this response is encoded in domain switching. In bulk ferroics, domains switch in a two-step process: nucleation and growth. For ferroelectrics, this can be explained by the Kolmogorov-Avrami-Ishibashi (KAI) model. Nevertheless, it is unclear whether domains remain correlated in finite geometries, as required by the KAI model. Moreover, although ferroelastic domains exist in many ferroelectrics, experimental limitations have hindered the study of their switching mechanisms. This uncertainty limits our understanding of domain switching and controllability, preventing thin-film and polycrystalline ferroelectrics from reaching their full technological potential. Here we used piezoresponse force microscopy to study the switching mechanisms of ferroelectric-ferroelastic domains in thin polycrystalline Pb 0.7Zr0.3TiO3 films at the nanometer scale. We have found that switched biferroic domains can nucleate at multiple sites with a coherence length that may span several grains, and that nucleators merge to form mesoscale domains, in a manner consistent with that expected from the KAI model. © 2012 American Physical Society.

Enhanced charge storage characteristics of silicon nanocrystals fabricated by electron-beam coevaporation of Si and SiOx(x=1 or 2)

In this article, a simple and flexible electron-beam coevaporation (EBCE) technique has been reported of fabrication of the silicon nanocrystals (Si NCs) and their application to the nonvolatile memory. For EBCE, the Si and SiOx(x=1 or 2) were used as source materials. Transmission electron microscopy images and Raman spectra measurement verified the formation of the Si NCs. The average size and area density of the Si NCs can be adjusted by increasing the Si:O weight ratio in source material, which has a great impact on the crystalline volume fraction of the deposited film and on the charge storage characteristics of the Si NCs. A memory window as large as 6.6 V under +/- 8 V sweep voltage was observed for the metal-oxide-semiconductor capacitor structure with the embedded Si NCs.

Ferroelectric hafnium oxide: A CMOS-compatible and highly scalable approach to future ferroelectric memories

With the ability to engineer ferroelectricity in HfO2 thin films, manufacturable and highly scaled MFM capacitors and MFIS-FETs can be implemented into a CMOS-environment. NVM properties of the resulting devices are discussed and contrasted to existing perovskite based FRAM.