991 resultados para semi-implicit scheme


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GaAs single crystal has been grown in recoverable satellite. Hall measurements indicate that the GaAs shows semi-insulating behavior. The structural properties of the crystal have been improved obviously, and their uniformity has been improved as well. The stoichiometry and its distribution in space-grown GaAs are improved greatly compared with the GaAs single crystal grown terrestrially. The properties of integrated circuits made by direct ion-implantation on space-grown GaAs are better than those made on ground-grown materials. These results show that the stoichiometry in semi-insulating GaAs seriously affects the properties of related devices.

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Experimental results have shown the fact that the deep-level centers in semi-insulating GaAs decrease with the improvement in stoichiometry. The electrical resistivity doubles when the concentration of EL2 centers decreases to a half. The microgravity-growth experiments also show that improved crystal stoichiometry results in a decrease of deep-level centers. (C) 1998 American Institute of Physics. [S0021-8979(98)04921-4].

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A semi-insulating (SI) GaAs single crystal was recently grown in a retrievable satellite. The average etch pit density (EPD) of dislocations in the crystal revealed by molten KOH is 2.0 x 10(4) cm(-2), and the highest EPD is 3.1 x 10(4) cm(-2) This result indicates a quite good homogenity of the EPD which is much better than the ground-grown crystals. A similar better homogenity of the stoichiometry i.e., the [As]/([As] + [Ga]) ratio has been found in the space-grown SI-GaAs single crystal studied nondestructively using a new mapping method based upon X-ray Bond diffraction. The average stoichiometry in the space-grown crystal is 0.50007 with mean-square deviation of 6x10(-6), while the average stoichiometry in ground-grown SI-GaAs crystal is more than 0.50010. (C) 1998 Elsevier Science B.V. All rights reserved.

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The electronic state of a two-dimensional electron system (2DES) in the presence of a perpendicular uniform magnetic field and a lateral superlattice (LS) is investigated theoretically. A comparative study is made between a LS induced by a spatial electrostatic potential modulation (referred to as a PMLS) and that induced by a spatial magnetic-field modulation (referred ro asa MMLS). By utilizing a finite-temperature self-consistent Hartree-Fock approximation scheme; the dependence of the electronic state on different system parameters (e.g., the modulation period, the modulation strength, the effective electron-electron interaction strength, the averaged electron density, and the system temperature) is studied in detail. The inclusion of exchange effect is found to bring qualitative changes to the electronic state of a PMLS, leading generally to a nonuniform spin splitting, and consequently the behavior of the electronic state becomes similar to that of a MMLS. The Landau-level coupling is taken into account, and is found to introduce some interesting features not observed before. It is also found that, even in the regime of intermediate modulation strength, the density dependence of the spin splitting of energy levels, either for a PMLS or a MMLS, can be qualitatively understood within the picture of a 2DES in a perpendicular magnetic field with the modulation viewed as a perturbation. [S0163-1829(97)02248-0].

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We have developed a novel InP-based, ridge-waveguide photonic integrated circuit (PIC), which consists of a 1.1-um wavelength Y-branch optical waveguide with low loss and improved far field pattern and a 1.3-um wavelength strained InGaAsP-InP multiple quantum-well superluminescent diode, with bundle integrated guide (BIG) as the scheme for monolithic integration. The simulations of BIG and Y-branches show low losses and improved far-field patterns, based on the beam propagation method (BPM). The amplified spontaneous emission of the device is up to 10 mW at 120 mA with no threshold and saturation. Spectral characteristics of about 30 nm width and less than I dB modulation are achieved using the built-in anti-lasing ability of Y-branch. The beam divergence angles in horizontal and vertical directions are optimized to as small as 12 degrees x8 degrees, resulting in good fiber coupling. The compactness, simplicity in fabrication, good superluminescent performance, low transmission loss and estimated low coupling loss prove the BIG and Y-branch method to be a feasible way for integration and make the photonic integrated circuit of Y-branch and superluminescent diode an promising candidate for transmitter and transceiver used in fiber optic gyroscope.

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High performance InGaAsP/InGaAsP strained compensated multiple-quantum-well (MQW) electroabsorption modulators (EAM) monolithically integrated with a DFB laser diode have been designed and realized by ultra low metal-organic vapor phase epitaxy (MOVPE) based on a novel butt joint scheme. The optimization thickness of upper SCH layer for DFB and EAM was obtained of the proposed MQW structure of the EAM through numerical simulation and experiment. The device containing 250(mu m) DFB and 170(mu m) EAM shows good material quality and exhibits a threshold current of 17mA, an extinction ratio of higher than 30 dB and a very high modulation efficiency (12dB/V) from 0V to 1V. By adopting a high-mesa ridge waveguide and buried polyimide, the capacitance of the modulator is reduced to about 0.30 pF corresponding to a 3dB bandwidth more than 20GHz.

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In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.

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A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18um 1P3M standard CMOS process. ne chip area is 0.28 mm(2) excluding test pads. Its power consumption is 25uW under 1.1V power supply.

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This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

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A new carrier frequency offset estimation scheme in orthogonal frequency division multiplexing (OFDM) is proposed. The scheme includes coarse frequency offset estimation and fine frequency offset estimation. The coarse frequency offset estimation method we present is a improvement of Zhang's method. The estimation range of the new method is as large as the overall signal-band width. A new fine frequency offset estimation algorithm is also discussed in this paper. The new algorithm has a better performance than the Schmidl's algorithm. The system we use to calculate and simulate is based on the high rate WLAN standard adopted by the IEEE 802.11 stanidardization group. Numerical results are presented to demonstrate the performance of the proposed algorithm.

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An apparent defect suppression effect has been observed in InP through an investigation of deep level defects in different semi-insulating (SI) InP materials. Quality improvement of SI-InP based on the defect suppression mechanism is presented.

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A DC-offset cancellation scheme in the 5GHz direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard is described in this paper. It uses the analog feedback loop to eliminate the DC-offset at the output of the double-balanced mixer. The mixer has a simulation voltage conversion gain of IMB at 5.2GHz, noise figure of 9.67dB, IIP3 of 7.6dBm. The solution provides 39.1dB reduction according to the leakage value at LO and mixer load resistors, the additional noise figure added to mixer is less than 0.9dB, the added power dissipation is 0.1mW and was fabricated in 60GHz 0.35 mu m SiGe BiCMOS technology.

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In this paper, we propose a new scheme for omnidirectional object-recognition in free space. The proposed scheme divides above problem into several onmidirectional object-recognition with different depression angles. An onmidirectional object-recognition system with oblique observation directions based on a new recognition theory-Biomimetic Pattern Recognition (BPR) is discussed in detail. Based on it, we can get the size of training samples in the onmidirectional object-recognition system in free space. Omnidirection ally cognitive tests were done on various kinds of animal models of rather similar shapes. For the total 8400 tests, the correct recognition rate is 99.89%. The rejection rate is 0.11% and on the condition of zero error rates. Experimental results are presented to show that the proposed approach outperforms three types of SVMs with either a three degree polynomial kernel or a radial basis function kernel.

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This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300MS/s 12-bit current-steering DAC based on Q(2) Random Walk switching scheme. The delta-sigma interpolator is used to reduce the phase truncation error and the ROM size. The measured spurious-free dynamic range (SFDR) is greater than 80 dB for 8-bit phase value and 12-bit sine-amplitude output. The DDFS prototype is fabricated in a 0.35um CMOS technology with core area of 1.11mm(2).