Determination of phthalate acid esters plasticizers in plastic by ultrasonic solvent extraction combined with solid-phase microextraction using calix[4]arene fiber

Ultrasonic solvent extraction combined with solid-phase microextraction (SPME) with calix[4]arene/hydroxy-terminated silicone (C[4]/OHTSO) oil coated fiber was used to extract phthalate acid esters (PAEs) plasticizers in plastic, such as blood bags, transfusion tubing, food packaging bag, and mineral water bottle for analysis by gas chromatography (GC). Both extraction parameters (i.e. extraction time, extraction temperature, ionic strength) and conditions of the thermal desorption in a GC injector were optimized by analysis of eight phthalates. The fiber shows wonderful sensitivity and selectivity to the tested compounds. Owing to its high thermal stability (380 degreesC), the carryover effect that often encountered when using conventional fibers can be reduced by appropriately enhancing the injector temperature. The method showed linear response over two to four orders of magnitude with correlation coefficients (r) better than 0.996, and limits of detection (LOD) ranged between 0.006 and 0.084 mug l(-1). The relative standard deviation values obtained were less than or equal to 10%. bis-2-Ethylhexyl phthalate (DEHP) was the sole analyte detected in these plastics and recoveries were in the ranges 95.5-101.4% in all the samples. (C) 2004 Elsevier B.V. All rights reserved.

Composition of volatile oil of Primula obconica in Central China

Primula obconica was introduced to Europe from Hubei, China in 1880, and has been cultivated worldwide as one of popular ornamental plants. The volatile oil of wild P. obconica collected from its original place, Yichang, Hubei was first investigated. A total of 43 compounds constituting 93.49% of the oil were identified by using GC and GC-MS. The major compounds were methyl 2,4-dihydroxy-5-methyl benzoate (30.41%), methyl 2,6-dihydroxy-4-methyl benzoate (29.27%), and hypnone (8.92%) etc. In comparison with the published data of some European cultivars, the native P. obconica seems to be allergen-free due to absence of primin and miconidin.

A settlement inhibition assay with cyprid larvae of the barnacle Balanus amphitrite

A settlement inhibition assay using barnacle cyprid larvae, Balanus amphitrite, was developed with Cd2+ and phenol as standard reference toxicants. Mean percentage settlement of cyprid larvae showed a progressive reduction with increasing concentrations of Cd2+ and phenol. A significant reduction in settlement was found when cyprids were exposed to 0.1 mgL(-1) Cd2+ or 10 mgL(-1) phenol. The assay was used to assess the sublethal toxicity of three oil dispersants (Vecom B-1425 GL, Norchem OSD-570 and Corexit 9905) commonly used in Hong Kong waters. Results of this investigation show that the barnacle settlement inhibition assay can be incorporated into the battery of tests currently available for ecotoxicological assessment of marine contaminants. (C) 1997 Elsevier Science Ltd.

A Low-Voltage Silicon Light Emitting Device in Standard Salicide CMOS Technology

National Natural Science Foundation of China 60536030 60776024 60877035 90820002 National High-Technology Research and Development Program of China 2007AA04Z329 2007AA04Z254

Oil-immersion or solid-immersion power enhancement of very-small-aperture lasers

An analysis of the enhancement of light transmission through a sub-wavelength aperture by oil- or solid-immersion is presented in this letter. An output power enhancement phenomenon related to the oil-immersion or solid-immersion mechanism is realized experimentally and reported for a very small aperture laser, which is an agreement with simulation analysis. This phenomenon could be useful for future optical data storage, microscopy and lithography.

Monolithic Integration of Light Emitting Diodes, Photodetector and Receiver Circuit in Standard CMOS Technology

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated with standard 0.35 mu m CMOS technology. This OEIC circuit consists of light emitting diodes (LED), silicon dioxide waveguide, photodiodes and receiver circuit. The silicon LED operates in reverse breakdown mode and can be turned on at 8.5V 10mA. The silicon dioxide waveguide is composed of multiple layers of silicon dioxide between different metals layers. A two PN-junctions photodetector composed of n-well/p-substrate junction and p(+) active implantation/n-well junction maximizes the depletion region width. The readout circuitry in pixels is exploited to handle as small as 0.1nA photocurrent. Simulation and testing results show that the optical emissions powers are about two orders higher than the low frequency detectivity of silicon CMOS photodetcctor and receiver circuit.

Design of Low Power Multi-Standard Active-RC Filter for WLAN and DVB-H

In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.

An Embedded Ultra Low Power Nonvolatile Memory in a Standard CMOS Logic Process

This paper proposes an embedded ultra low power nonvolatile memory in a standard CMOS logic process. The memory adopts a bit cell based on the differential floating gate PMOS structure and a novel operating scheme. It can greatly improve the endurance and retention characteristic and make the area/bit smaller. A new high efficiency all-PMOS charge pump is designed to reduce the power consumption and to increase the power efficiency. It eliminates the body effect and can generate higher output voltage than conventional structures for a same stage number. A 32-bit prototype chip is fabricated in a 0.18 mu m 1P4M standard CMOS logic process and the core area is 0.06 mm(2). The measured results indicate that the typical write/erase time is 10ms. With a 700 kHz clock frequency, power consumption of the whole memory is 2.3 mu A for program and 1.2 mu A for read at a 1.6V power supply.

A 1Gb/s silicon photo-receiver in standard CMOS for 850-nm optical communication

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with standard 0.6 mu m CMOS technology. This OEIC circuit consisted of an integrated double photodiode detector (DPD) and a preamplifier. The DPD detector exhibited high bandwidth by screening the bulk-generated diffusion carriers and suppressing the slow diffusion tail effect. The preamplifier exploited the regulated cascode (RGC) configuration as the input stage of receiver, thus isolating the influence of photodiode capacitance and input parasitic capacitance on bandwidth. Testing results showed that the bandwidth of OEIC was 700MHz, indicating the bit rate of 1Gb/s was achieved.

A standard CMOS compatible monolithic photo-detector and trans-impedance amplifier

A 1GHz monolithic photo-detector (PD) and trans-impedance amplifier (TIA) is designed with the standard 0.35 mu m CMOS technique. The design of the photo-detector is analyzed and the CMOS trans-impedance amplifier is also analyzed in the paper. The integrating method is described too. The die photograph is also showed in the paper.

A silicon light emitting devices in standard CMOS technology

A silicon light emitting device is designed and simulated. It is fabricated in 0.6 mum standard CMOS technology. The device can give more than 1 muW optical power of visible light under reverse breakdown. The device can be turned on at a bias of 0.88 V and work in a large range of voltage: 1.0-6.0 V The external electrical-optical conversion efficiency is more than 10(-6). The optical spectrum of the device is between 540-650 nm, which have a clear peak near 580 nm. The emission mechanism can be explained by a hot carrier direct recombination model.

An Ultra Low Power Non-volatile Memory in Standard CMOS Process for Passive RFID Tags

An ultra low power non-volatile memory is designed in a standard CMOS process for passive RFID tags. The memory can operate in a new low power operating scheme under a wide supply voltage and clock frequency range. In the charge pump circuit the threshold voltage effect of the switch transistor is almost eliminated and the pumping efficiency of the circuit is improved. An ultra low power 192-bit memory with a register array is implemented in a 0.18 mu M standard CMOS process. The measured results indicate that, for the supply voltage of 1.2 volts and the clock frequency of 780KHz, the current consumption of the memory is 1.8 mu A (3.6 mu A) at the read (write) rate of 1.3Mb/s (0.8Kb/s).