A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling

Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (IP) core integration into complex system-on-chip (SOC) architectures. These cores require thorough verification of their functionality to avoid erroneous behavior in the final device. Formal verification methods are capable of detecting any design bug. However, due to state explosion, their use remains limited to small circuits. Alternatively, simulation-based verification can explore hardware descriptions of any size, although the corresponding stimulus generation, as well as functional coverage definition, must be carefully planned to guarantee its efficacy. In general, static input space optimization methodologies have shown better efficiency and results than, for instance, Coverage Directed Verification (CDV) techniques, although they act on different facets of the monitored system and are not exclusive. This work presents a constrained-random simulation-based functional verification methodology where, on the basis of the Parameter Domains (PD) formalism, irrelevant and invalid test case scenarios are removed from the input space. To this purpose, a tool to automatically generate PD-based stimuli sources was developed. Additionally, we have developed a second tool to generate functional coverage models that fit exactly to the PD-based input space. Both the input stimuli and coverage model enhancements, resulted in a notable testbench efficiency increase, if compared to testbenches with traditional stimulation and coverage scenarios: 22% simulation time reduction when generating stimuli with our PD-based stimuli sources (still with a conventional coverage model), and 56% simulation time reduction when combining our stimuli sources with their corresponding, automatically generated, coverage models.

Harmonic Distortion of Unstrained and Strained FinFETs Operating in Saturation

The harmonic distortion (HD) exhibited by un-strained and biaxially strained fin-shaped field-effect transistors operating in saturation as single-transistor amplifiers has been investigated for devices with different channel lengths L and fin widths W(fin). The study has been performed through device characterization, 3-D device simulations, and modeling. Nonlinearity has been evaluated in terms of second- and third-order HDs (HD2 and HD3, respectively), and a discussion on its physical sources has been carried out. Also, the influence of the open-loop voltage gain AV in HD has been observed.

Trapezoidal SOI FinFET analog parameters` dependence on cross-section shape

The trapezium is often a better approximation for the FinFET cross-section shape, rather than the design-intended rectangle. The frequent width variations along the vertical direction, caused by the etching process that is used for fin definition, may imply in inclined sidewalls and the inclination angles can vary in a significant range. These geometric variations may cause some important changes in the device electrical characteristics. This work analyzes the influence of the FinFET sidewall inclination angle on some relevant parameters for analog design, such as threshold voltage, output conductance, transconductance, intrinsic voltage gain (A V), gate capacitance and unit-gain frequency, through 3D numeric simulation. The intrinsic gain is affected by alterations in transconductance and output conductance. The results show that both parameters depend on the shape, but in different ways. Transconductance depends mainly on the sidewall inclination angle and the fixed average fin width, whereas the output conductance depends mainly on the average fin width and is weakly dependent on the sidewall inclination angle. The simulation results also show that higher voltage gains are obtained for smaller average fin widths with inclination angles that correspond to inverted trapeziums, i.e. for shapes where the channel width is larger at the top than at the transistor base because of the higher attained transconductance. When the channel top is thinner than the base, the transconductance degradation affects the intrinsic voltage gain. The total gate capacitances also present behavior dependent on the sidewall angle, with higher values for inverted trapezium shapes and, as a consequence, lower unit-gain frequencies.

Cryogenic operation of FinFETs aiming at analog applications

FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold voltage, subthreshold slope and carrier mobility will be studied. Also some important figures of merit for analog circuit operation as for readout electronics, such as transconductance, output conductance and intrinsic voltage gain will be covered. It is demonstrated that the threshold voltage of undoped narrow FinFETs is less temperature-dependent than for a planar single-gate device with similar doping concentration. The temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L = 90 nm FinFET is degraded by 2 dB when the temperature reduces from 300 K to 100 K. (C) 2009 Elsevier Ltd. All rights reserved.

Influence of the sidewall crystal orientation, HfSiO nitridation and TiN metal gate thickness on n-MuGFETs under analog operation

This work characterizes the analog performance of SOI n-MuGFETs with HfSiO gate dielectric and TiN metal gate with respect to the influence of the high-k post-nitridation. TiN thickness and device rotation. A thinner TiN metal gate is found favorable for improved analog characteristics showing an increase in intrinsic voltage gain. The devices where the high-k material is subjected to a nitridation step indicated a degradation of the Early voltage (V(EA)) values which resulted in a lower voltage gain. The 45 degrees rotated devices have a smaller V(EA) than the standard ones when a HfSiO dielectric is used. However, the higher transconductance of these devices, due to the increased mobility in the (1 0 0) sidewall orientation, compensates this V(EA) degradation of the voltage gain, keeping it nearly equal to the voltage gain values of the standard devices. (C) 2011 Elsevier Ltd. All rights reserved.

Threshold voltages of SOI MuGFETs

The multiple-gate field-effect transistor (MuGFET) is a device with a gate folded on different sides of the channel region. They are one of the most promising technological solutions to create high-performance ultra-scaled SOI CMOS. In this work, the behavior of the threshold voltage in double-gate, triple-gate and quadruple-gate SOI transistors with different channel doping concentrations is studied through three-dimensional numerical simulation. The results indicated that for double-gate transistors, one or two threshold voltages can be observed, depending on the channel doping concentration. However, in triple-gate and quadruple-gate it is possible to observe up to four threshold voltages due to the corner effect and the different doping concentration between the top and bottom of the Fin. (C) 2008 Elsevier Ltd. All rights reserved.

Analog performance of standard and strained triple-gate silicon-on-insulator nFinFETs

This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-K dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas the increase of the channel length degrades the early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. (C) 2008 Elsevier Ltd. All rights reserved.

Improved generation lifetime model for the electrical characterization of single- and double-gate SOI nMOSFETs

This work proposes a refined technique for the extraction of the generation lifetime in single- and double-gate partially depleted SOI nMOSFETs. The model presented in this paper, based on the drain current switch-off transients, takes into account the influence of the laterally non-uniform channel doping, caused by the presence of the halo implanted region, and the amount of charge controlled by the drain and source junctions on the floating body effect when the channel length is reduced. The obtained results for single- gate (SG) devices are compared with two-dimensional numerical simulations and experimental data, extracted for devices fabricated in a 0.1 mu m SOI CMOS technology, showing excellent agreement. The improved model to determine the generation lifetime in double-gate (DG) devices beyond the considerations previously presented also consider the influence of the silicon layer thickness on the drain current transient. The extracted data through the improved model for DG devices were compared with measurements and two-dimensional numerical simulations of the SG devices also presenting a good adjustment with the channel length reduction and the same tendency with the silicon layer thickness variation.

Vortex configuration flow cell based on low temperature cofired ceramics as a compact chemiluminescence microsystern

The integration of optical detection methods in continuous flow microsystems can highly extend their range of application, as long as some negative effects derived from their scaling down can be minimized. Downsizing affects to a greater extent the sensitivity of systems based on absorbance measurements than the sensitivity of those based on emission ones. However, a careful design of the instrumental setup is needed to maintain the analytical features in both cases. In this work, we present the construction and evaluation of a simple miniaturized optical system, which integrates a novel flow cell configuration to carry out chemiluminescence (CL) measurements using a simple photodiode. It consists of a micro-mixer based on a vortex structure, which has been constructed by means of the low-temperature cofired ceramics (LTCC) technology. This mixer not only efficiently promotes the CL reaction due to the generated high turbulence but also allows the detection to be carried out in the same area, avoiding intensity signal losses. As a demonstration, a flow injection system has been designed and optimized for the detection of cobalt(H) in water samples. It shows a linear response between 2 and 20 mu M with a correlation of r > 0.993, a limit of detection of 1.1 mu M, a repeatability of RSD = 12.4 %, and an analysis time of 17 s. These results demonstrate the suitability of the proposal to the determination of compounds involved in CL reactions by means of an easily constructed versatile device based on low-cost instrumentation.

Tunable Bragg filter using silicon compound films

In this work, we present the simulation, fabrication and characterization of a tunable Bragg filter employing amorphous dielectric films deposited by plasma enhanced chemical vapor deposition technique on a crystalline silicon substrate. The optical device was built using conventional microelectronic processes and consisted of fifteen periodic intervals of Si3N4 layers separated by air with appropriated thickness and lengths to produce transmittance attenuation peaks in the visible region. For this, previous simulations were realized based in the optical parameters of the dielectric film, which were extracted from ellipsometry and profilometry techniques. For the characterization of the optical interferential filter, a 633 nm monochromatic light was injected on the filter, and then the transmitted output light was collected and conducted to a detector through an optical waveguide made also of amorphous dielectric layers. Afterwards, the optical filter was mounted on a Peltier thermoelectric device in order to control the temperature of the optical device. When the temperature of filter changes, a refractive index variation is originated in the dielectric film due to the thermo-optic effect, producing a shift of attenuation peak, which can be well predicted by numerical simulations. This characteristic allows this device to be used as a thermo-optic sensor. (C) 2007 Elsevier B.V. All rights reserved.

Porous silicon optical cavity structure applied to high sensitivity organic solvent sensor

The present work reports the thermal annealing process, the number of layer and electrochemical process effect in the optical response quality of Bragg and microcavity devices that were applied as organic solvent sensors. These devices have been obtained by using porous silicon (PS) technology. The optical characterization of the Bragg reflector, before annealing, showed a broad photonic band-gap structure with blue shifted and narrowed after annealing process. The electrochemical process used to obtain the PS-based device imposes the limit in the number of layers because of the chemical dissolution effect. The interface roughness minimizations in the devices have been achieved by using the double electrochemical cell setup. The microcavity devices showed to have a good sensibility for organic solvent detection. The thermal annealed device showed better sensibility feature and this result was attributed to passivation of the surface devices. (c) 2007 Elsevier Ltd. All rights reserved.

An RFID Bulk Cargo Supervising System

In this work, a system using active RFID tags to supervise truck bulk cargo is described. The tags are attached to the bodies of the trucks and readers are distributed in the cargo buildings and attached to weighs and the discharge platforms. PDAs with camera and support to a WiFi network are provided to the inspectors and access points are installed throughout the discharge area to allow effective confirmations of unload actions and the acquisition of pictures for future audit. Broadband radio equipments are used to establish efficient communication links between the weighs and cargo buildings which are usually located very far from each other in the field. A web application software was especially developed to enable robust communication between the equipments for efficient device management, data processing and reports generation to the operating personal. The system was deployed in a cargo station of a Brazilian seashore port. The obtained results prove the effectiveness of the proposed system.

Cryogenic Operation of Junctionless Nanowire Transistors

This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature.

Mock circulatory system for the evaluation of left ventricular assist devices, endoluminal prostheses, and vascular diseases

A new digital computer mock circulatory system has been developed in order to replicate the physiologic and pathophysiologic characteristics of the human cardiovascular system. The computer performs the acquisition of pressure, flow, and temperature in an open loop system. A computer program has been developed in Labview programing environment to evaluate all these physical parameters. The acquisition system was composed of pressure, flow, and temperature sensors and also signal conditioning modules. In this study, some results of flow, cardiac frequencies, pressures, and temperature were evaluated according to physiologic ventricular states. The results were compared with literature data. In further works, performance investigations will be conducted on a ventricular assist device and endoprosthesis. Also, this device should allow for evaluation of several kinds of vascular diseases.

Computational fluid dynamics investigation of a centrifugal blood pump

In the development of a ventricular assist device, computational fluid dynamics (CFD) analysis is an efficient tool to obtain the best design before making the final prototype. In this study, different designs of a centrifugal blood pump were developed to investigate flow characteristics and performance. This study assumed the blood flow as being an incompressible homogeneous Newtonian fluid. A constant velocity was applied at the inlet; no slip boundary conditions were applied at device wall; and pressure boundary conditions were applied at the outlet. The CFD code used in this work was based on the finite volume method. In the future, the results of CFD analysis can be compared with flow visualization and hemolysis tests.