Cryogenic Operation of Junctionless Nanowire Transistors


Autoria(s): SOUZA, Michelly de; PAVANELLO, Marcelo A.; TREVISOLI, Renan D.; DORIA, Rodrigo T.; COLINGE, Jean-Pierre
Contribuinte(s)

UNIVERSIDADE DE SÃO PAULO

Data(s)

18/10/2012

18/10/2012

2011

Resumo

This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature.

CAPES

FAPESP

CNPq

SFI[05/IN/I888]

EC[216171]

EC[216373]

Identificador

IEEE ELECTRON DEVICE LETTERS, v.32, n.10, p.1322-1324, 2011

0741-3106

http://producao.usp.br/handle/BDPI/18738

10.1109/LED.2011.2161748

http://dx.doi.org/10.1109/LED.2011.2161748

Idioma(s)

eng

Publicador

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

Relação

Ieee Electron Device Letters

Direitos

restrictedAccess

Copyright IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

Palavras-Chave #Junctionless transistor #low temperature #nanowire transistor #silicon-on-insulator (SOI) #threshold voltage model #Engineering, Electrical & Electronic
Tipo

article

original article

publishedVersion