66 resultados para Tuned filter
em QUB Research Portal - Research Directory and Institutional Repository for Queen's University Belfast
Resumo:
The design of a low loss quasi-optical beam splitter which is required to provide efficient diplexing of the bands 316.5-325.5 GHz and 349.5-358.5 GHz is presented. To minimise the filter insertion loss, the chosen architecture is a three-layer freestanding array of dipole slot elements. Floquet modal analysis and finite element method computer models are used to establish the geometry of the periodic structure and to predict its spectral response. Two different micromachining approaches have been employed to fabricate close packed arrays of 460 mm long elements in the screens that form the basic building block of the 30mm diameter multilayer frequency selective surface. Comparisons between simulated and measured transmission coefficients for the individual dichroic surfaces are used to determine the accuracy of the computer models and to confirm the suitability of the fabrication methods.
Resumo:
A high-sample rate 3D median filtering processor architecture is proposed, based on a novel 3D median filtering algorithm, that can reduce the computing complexity in comparison with the traditional bubble sorting algorithm. A 3 x 3 x 3 filter processor is implemented in VHDL, and the simulation verifies that the processor can process a 128 x 128 x 96 MRI image in 0.03 seconds while running at 50 MHz.
Resumo:
An analysis of a modified series-L/parallel-tuned Class-E power amplifier is presented, which includes the effects that a shunt capacitance placed across the switching device will have on Class-E behaviour. In the original series L/parallel-tuned topology in which the output transistor capacitance is not inherently included in the circuit, zero-current switching (ZCS) and zero-current derivative switching (ZCDS) conditions should be applied to obtain optimum Class-E operation. On the other hand, when the output transistor capacitance is incorporated in the circuit, i.e. in the modified series-L/parallel-tuned topology, the ZCS and ZCDS would not give optimum operation and therefore zero-voltage-switching (ZVS) and zero-voltage-derivative switching (ZVDS) conditions should be applied instead. In the modified series-L/parallel-tuned Class-E configuration, the output-device inductance and the output-device output capacitance, both of which can significantly affect the amplifier's performance at microwave frequencies, furnish part, if not all, of the series inductance L and the shunt capacitance COUT, respectively. Further, when compared with the classic shunt-C/series-tuned topology, the proposed Class-E configuration offers some advantages in terms of 44% higher maximum operating frequency (fMAX) and 4% higher power-output capability (PMAX). As in the classic topology, the fMAX of the proposed amplifier circuit is reached when the output-device output capacitance furnishes all of the capacitance COUT, for a given combination of frequency, output power and DC supply voltage. It is also shown that numerical simulations agree well with theoretical predictions.
Resumo:
In this brief, we propose a new Class-E frequency multiplier based on the recently introduced Series-L/Parallel-Tuned Class-E amplifier. The proposed circuit produces even-order output harmonics. Unlike previously reported solutions the proposed circuit can operate under 50% duty ratio which minimizes the conduction losses. The circuit also offers the possibility for increased maximum operating frequency, reduced peak switch voltage, higher load resistance and inherent bond wire absorption; all potentially useful in monolithic microwave integrated circuit implementations. In addition, the circuit topology suggested large transistors with high output capacitances can be deployed. Theoretical design equations are given and the predictions made using these are shown to agree with harmonic balance circuit simulation results.
Resumo:
The impact that the transmission-line load-network has on the performance of the recently introduced series-L/parallel-tuned Class-E amplifier and the classic shunt-C/series-tuned configuration when compared to optimally derived lumped load networks is discussed. In addition an improved load topology which facilitates harmonic suppression of up to 5 order as required for maximum Class-E efficiency as well as load resistance transformation and a design procedure involving the use of Kuroda's identity and Richard's transformation enable a distributed synthesis process which dispenses with the need for iterative tuning as previously required in order to achieve optimum Class-E operation. © 2005 IEEE.
Resumo:
In DSP applications such as fixed transforms and filtering, the full flexibility of a general-purpose multiplier is not required and only a limited range of values is needed on one of the multiplier inputs. A new design technique has been developed for deriving multipliers that operate on a limited range of multiplicands. This can be used to produce FPGA implementations of DSP systems where area is dramatically improved. The paper describes the technique and its application to the design of a poly-phase filter on a Virtex FPGA. A 62% area reduction and 7% speed increase is gained when compared to an equivalent design using general purpose multipliers. It is also compared favourably to other known fixed coefficient approaches.
Resumo:
An efficient analysis and design of an electromagnetic-bandgap (EBG) waveguide with resonant loads is presented. Equivalent-circuit analysis is employed to demonstrate the differences between EBG waveguides with resonant and nonresonant loadings. As a result of the resonance, transmission zeros at finite frequencies emerge. The concept is demonstrated in E-plane waveguides. A generic fast and efficient formulation is presented, which starts from the generalized scattering matrix of the unit cell and derives the dispersion properties of the infinite structure. Both real and imaginary parts of the propagation constant are derived and discussed. The Floquet wavelength and impedance are also presented. The theoretical results are validated by comparison with simulations of a finite structure and experimental results. The application of the proposed EBG waveguide in the suppression of the spurious passband of a conventional E-plane filter is presented by experiment.
Resumo:
A novel 3rd-order compact E-plane ridge waveguide filter is presented. Miniaturization is achieved upon introducing a configuration of parallel-coupled E-plane ridge waveguide resonators. Furthermore, the proposed filter allows for transmission zeros at finite frequencies. Fabrication simplicity and mass producibility of standard E-plane filters is maintained. The numerical and experimental results are presented to validate the proposed configuration. A miniaturisation factor of 2 and very sharp upper cutoff are achieved. 2005 Wiley Periodicals, Inc.