A novel FER filter architecture for efficient signal boundary handling on Xilinx VIRTEX FPGAs
Data(s) |
01/04/2003
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Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Benkrid , A , Benkrid , K & Crookes , D 2003 , ' A novel FER filter architecture for efficient signal boundary handling on Xilinx VIRTEX FPGAs ' Paper presented at 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003) , Napa , Canada , 01/04/2003 - 01/04/2003 , pp. 273-275 . |
Tipo |
conferenceObject |