Assessment of SET Logic Robustness Through Noise Margin Modeling

A compact model for noise margin (NM) of single-electron transistor (SET) logic is developed, which is a function of device capacitances and background charge (zeta). Noise margin is, then, used as a metric to evaluate the robustness of SET logic against background charge, temperature, and variation of SET gate and tunnel junction capacitances (CG and CT). It is shown that choosing alpha=CT/CG=1/3 maximizes the NM. An estimate of the maximum tolerable zeta is shown to be equal to plusmn0.03 e. Finally, the effect of mismatch in device parameters on the NM is studied through exhaustive simulations, which indicates that a isin [0.3, 0.4] provides maximum robustness. It is also observed that mismatch can have a significant impact on static power dissipation.

Drive current boosting of n-type tunnel FET with strained SiGe layer at source

Though silicon tunnel field effect transistor (TFET) has attracted attention for sub-60 mV/decade subthreshold swing and very small OFF current (IOFF), its practical application is questionable due to low ON current (ION) and complicated fabrication process steps. In this paper, a new n-type classical-MOSFET-alike tunnel FET architecture is proposed, which offers sub-60 mV/decade subthreshold swing along with a significant improvement in ION. The enhancement in ION is achieved by introducing a thin strained SiGe layer on top of the silicon source. Through 2D simulations it is observed that the device is nearly free from short channel effect (SCE) and its immunity towards drain induced barrier lowering (DIBL) increases with increasing germanium mole fraction. It is also found that the body bias does not change the drive current but after body current gets affected. An ION of View the MathML source and a minimum average subthreshold swing of 13 mV/decade is achieved for 100 nm channel length device with 1.2 V supply voltage and 0.7 Ge mole fraction, while maintaining the IOFF in fA range.

Hybrid algorithms for power system unit commitment

Four hybrid algorithms has been developed for the solution of the unit commitment problem. They use simulated annealing as one of the constituent techniques, and produce lower cost schedules; two of them have less overhead than other soft computing techniques. They are also more robust to the choice of parameters. A special technique avoids the generating of infeasible schedules, and thus reduces computation time.

Leveraging Partially Enhanced Scan for Improved Observability in Delay Fault Testing

Enhanced Scan design can significantly improve the fault coverage for two pattern delay tests at the cost of exorbitantly high area overhead. The redundant flip-flops introduced in the scan chains have traditionally only been used to launch the two-pattern delay test inputs, not to capture tests results. This paper presents a new, much lower cost partial Enhanced Scan methodology with both improved controllability and observability. Facilitating observation of some hard to observe internal nodes by capturing their response in the already available and underutilized redundant flip-flops improves delay fault coverage with minimal or almost negligible cost. Experimental results on ISCAS'89 benchmark circuits show significant improvement in TDF fault coverage for this new partial enhance scan methodology.

Quadrature generation techniques for frequency multiplication based oscillators

Frequency multiplication (FM) can be used to design low power frequency synthesizers. This is achieved by running the VCO at a much reduced frequency, while employing a power efficient frequency multiplier, and also thereby eliminating the first few dividers. Quadrature signals can be generated by frequency- multiplying low frequency I/Q signals, however this also multiplies the quadrature error of these signals. Another way is generating additional edges from the low-frequency oscillator (LFO) and develop a quadrature FM. This makes the I-Q precision heavily dependent on process mismatches in the ring oscillator. In this paper we examine the use of fewer edges from LFO and a single stage polyphase filter to generate approximate quadrature signals, which is then followed by an injection-locked quadrature VCO to generate high- precision I/Q signals. Simulation comparisons with the existing approach shows that the proposed method offers very good phase accuracy of 0.5deg with only a modest increase in power dissipation for 2.4 GHz IEEE 802.15.4 standard using UMC 0.13 mum RFCMOS technology.

Slim P‐E hysteresis loop and anomalous dielectric response in sol-gel derived antiferroelectric PbZrO3 thin films

Sol-gel derived PbZrO3 (PZ) thin films have been deposited on Pt(111)/Ti/SiO2/Si substrate and according to the pseudotetragonal symmetry of PZ, the relatively preferred (110)t oriented phase formation has been noticed. The room temperature P‐E hysteresis loops have been observed to be slim by nature. The slim hysteresis loops are attributed to the [110]t directional antiparallel lattice motion of Pb ions and by the directionality of the applied electric field. Pure PZ formation has been characterized by the dielectric phase transition at 235 °C and antiferroelectric P‐E hysteresis loops at room temperature. Dielectric response has been characterized within a frequency domain of 100 Hz–1 MHz at various temperatures ranging from 40 to 350 °C. Though frequency dispersion of dielectric behaves like a Maxwell–Wagner type of relaxation, ω2 dependency of ac conductivity indicates that there must be G‐C equivalent circuit dominance at high frequency. The presence of trap charges in PZ has been determined by Arrhenius plots of ac conductivity. The temperature dependent n (calculated from the universal power law of ac conductivity) values indicate an anomalous behavior of the trapped charges. This anomaly has been explained by strongly and weakly correlated potential wells of trapped charges and their behavior on thermal activation. The dominance of circuit∕circuits resembling Maxwell–Wagner type has been investigated by logarithmic Nyquist plots at various temperatures and it has been justified that the dielectric dispersion is not from the actual Maxwell–Wagner-type response.

Modeling and Analysis of Noise Margin in SET Logic

In this paper the static noise margin for SET (single electron transistor) logic is defined and compact models for the noise margin are developed by making use of the MIB (Mahapatra-Ionescu-Banerjee) model. The variation of the noise margin with temperature and background charge is also studied. A chain of SET inverters is simulated to validate the definition of various logic levels (like VIH, VOH, etc.) and noise margin. Finally the noise immunity of SET logic is compared with current CMOS logic.

Optimal configurations of active fiber composites based on asymptotic torsional analysis - art. no. 641413

Active Fiber Composites (AFC) possess desirable characteristics over a wide range of smart structure applications, such as vibration, shape and flow control as well as structural health monitoring. This type of material, capable of collocated actuation and sensing, call be used in smart structures with self-sensing circuits. This paper proposes four novel applications of AFC structures undergoing torsion: sensors and actuators shaped as strips and tubes; and concludes with a preliminary failure analysis. To enable this, a powerful mathematical technique, the Variational Asymptotic Method (VAM) was used to perform cross-sectional analyses of thin generally anisotropic AFC beams. The resulting closed form expressions have been utilized in the applications presented herein.

Design of a high sensitivity FET integrated MEMS microphone

FET based MEMS microphones comprise of a flexible diaphragm that works as the moving gate of the transistor. The integrated electromechanical transducer can be made more sensitive to external sound pressure either by increasing the mechanical or the electrical sensitivities. We propose a method of increasing the overall sensitivity of the microphone by increasing its electrical sensitivity. The proposed microphone uses the transistor biased in the sub-threshold region where the drain current depends exponentially on the difference between the gate-to-source voltage and the threshold voltage. The device is made more sensitive without adding any complexity in the mechanical design of the diaphragm.

Linear transconductor with flipped voltage follower in 130 nm CMOS

This paper presents a modified design method for linear transconductor circuit in 130 nm CMOS technology to improve linearity, robustness against process induced threshold voltage variability and reduce harmonic distortion. Source follower in the adaptively biased differential pair (ABDP) linear transconductor circuit is replaced with flipped voltage follower to improve the efficiency of the tail current source, which is connected to a conventional differential pair. The simulation results show the performance of the modified circuit also has better speed, noise performance and common mode rejection ratio compared to the ABDP circuit.

Reliability analysis of torsional varactor

A torsional MEMS varactor with wide dynamic range, lower actuation voltage and isolation between actuation voltage and signal voltage has been proposed in C. Venkatesh et al. (2005). In this paper we address the effects of pull-in, residual stress and continuous cycling on the performance of torsional MEMS varactor.

A silicon micromachined photonic band gap cell, characteristics and an application

A novel PBG cell based on micromachining of Silicon using wet anisotropic etching has been considered. Since this is based on etching of the Silicon substrate, it is amenable to fabrication with standard Silicon processes and integration with millimeter wave circuits. We characterize this kind of PBG cell by full wave simulations using a time domain code. For the purpose of characterization, the scenario of a 50 ohm microstrip line placed on a Silicon substrate which is anisotropically etched to create patterns with sloping walls is considered. This is shown to produce the well known PBG response of stop bands in certain frequency bands. We look at the variation in the transmission coefficient (S-21) response as the number of periods, length based average fill factor and depth of micromachining are varied. One application of a low pass filter has been proposed and simulated results are given.

Characteristics of field-effect transistors based on undoped and B-and N-doped few-layer graphenes

Field-effect transistor characteristics of few-layer graphenes prepared by several methods have been investigated in comparison with those of single-layer graphene prepared by the in situ reduction of single-layer graphene oxide. Ambipolar features have been observed with single-layer graphene and n-type behaviour with all the few-layer graphenes, the best characteristics being found with the graphene possessing 2-3 layers prepared by arc-discharge of graphite in hydrogen. FETs based on boron and nitrogen doped graphene show n-type and p-type behaviour respectively. (C) 2010 Elsevier Ltd. All rights reserved.

Frequency characteristics of very fast transient currents in a 245-kV GIS

The conducted as well as the induced voltages on control cables and control circuits due to transient electromagnetic (EM) fields generated during switching operations in a gas-insulated substation (GIS) depend on the waveshape of the very fast transient overvoltages and the associated very-fast transient currents (VFTCs). The aim of this paper is to build a basis for characterizing the VFTC generated in gas-insulated switchgear and the,associated equipment during switching operations for the study of transient coupling phenomena. The peak magnitudes of VFTC and their dominant frequency content at various locations have been computed in a 245-kV GIS for different switching operations as well as substation configurations. Finally, the influence of the substation layout on the frequency spectrum, dominant frequencies, and the highest possible frequency component of the VFTC at various distances from the switch have been reported.

A hybrid computer for X-ray crystallography

A hybrid computer for structure factor calculations in X-ray crystallography is described. The computer can calculate three-dimensional structure factors of up to 24 atoms in a single run and can generate the scatter functions of well over 100 atoms using Vand et al., or Forsyth and Wells approximations. The computer is essentially a digital computer with analog function generators, thus combining to advantage the economic data storage of digital systems and simple computing circuitry of analog systems. The digital part serially selects the data, computes and feeds the arguments into specially developed high precision digital-analog function generators, the outputs of which being d.c. voltages, are further processed by analog circuits and finally the sequential adder, which employs a novel digital voltmeter circuit, converts them back into digital form and accumulates them in a dekatron counter which displays the final result. The computer is also capable of carrying out 1-, 2-, or 3-dimensional Fourier summation, although in this case, the lack of sufficient storage space for the large number of coefficients involved, is a serious limitation at present.