A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

High efficiency RFID UHF power converter

The paper proposes a high efficiency RFID UHF power converter unit to overcome the low efficiency problem. This power converter is mainly composed of an RF-DC converter and a DC-DC converter. In order to overcome the low efficiency problem in low current consuming condition, a DC-DC converter is added to conventional single RF-DC converter rectifier to increase the rectifying efficiency of the RFDC rectifier. The power converter is implemented in a 0.18 um mixed signal, 1p6m CMOS technology. Simulation shows the power converter has an average improvement of 5% and can achieve efficiency as high as 30% with 900MHz, 16uW RF input power and 1.3 V 3.6uA DC output.

An ambient proof and wide tuning range LC VCO with automatic amplitude control for tuner applications

This paper represents a LC VCO with AAC (Auto Amplitude Control), in which PMOS FETs are used as active components, and the varactors are directly connected to ground to widen Kvco linear range. The AAC circuitry adds little noise to the VCO and provides it with robust performance over a wide temperature and carrier frequency range. The VCO is fabricated in 50-GHz 0.35-mu m SiGe BiCMOS process. The measurement results show that it has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole circuit draws 6.6-mA current from 5.0-V supply.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction

This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital processor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-N synthesizer with 1 MHz reference input Was implemented in a 0.18μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3μs,and the phase noise is -108 dBc/Hz@1MHz.The reference spur is -52 dBc.

A 1.1GHz LC VCO with Automatic Amplitude Control for Tuner Applications

This paper presents an LC VCO with auto-amplitude control （AAC）, in which pMOS FETs are used,and the varactors are directly connected to ground to widen the linear range of Kvco. The AAC circuitry adds little noise to the VCO but provides it with robust performance over a wide temperature and carrier frequency range.The VCO is fabricated in a chartered 50GHz 0.35μm SiGe BiCMOS process. The measurements show that it has - 127. 27dBc/Hz phase noise at 1MHz offset and a linear gain of 32.4MHz/V between 990MHz and 1.14GHz.The whole circuit draws 6. 6mA current from 5V supply.

Monolithically Integrated Optoelectronic Receivers Implemented in 0. 25μm MS/RF CMOS

A monolithically integrated optoelectronic receiver is presented. A silicon-based photo-diode and receiver circuits are integrated on identical substrates in order to eliminate the parasitics induced by hybrid packaging. Implemented in the present deep sub-micron MS/RF （mixed signal, radio frequency） CMOS,this monolithically OEIC takes advantage of several new features to improve the performance of the photo-diode and eventually the whole OEIC.

基于MSP430 单片机和DS18B20 的多分支多通道温度测量系统远程监控软件

This paper present that the system can acquire the remote temperature measurement data of 40 monitoring points,through the RS-232 serial port and the Intranet.System s hardware is consist of TI s MSP430F149 mixed-signal processor and UA7000A network module.Using digital temperature sensor DS18B20,the structure is simple and easy to expand,the sensors directly send out the temperature data.MSP430F149 has the advantage of ultra-low-power and high degree of integration.Using msp430F149,the multi-branch multi-p...中文文摘：文章论述了通过RS-232串口和Intranet网络,来实现对远端的40个温度测量点的监控。系统硬件由TI公司的MSP430F149混合信号处理器和UA7000A网络模块构成。传感器采用数字式温度传感器DS18B20,它将直接得到温度的数字量,结构简单,易于扩展。MSP430F149处理器具有超低功耗和高度集成等优点,利用它构建的多分支多通道温度测量系统功能强大,结构简单,可靠性高,抗干扰能力强。系统客户端软件采用Microsoft Visual C++6.0设计。本监控系统能够很好地完成对4个分支共40个温度测量点的远程实时监控。

基于TCP/ IP 协议的CSR离子泵电源远程监控软件系统设计

This paper discuss a Ion-pump Power Supply control system making use of RS232 series bus and Intranet.The system s hardware VAC800 is composed of MSP430F149 mixed-signal processors produced by TI and UA7000A network model.MSP430F149 has advantages of ultra-low-power and high-integration.The Ion-pump Power Supply control system has the characteristics of strong function,simple structure,high reliability,strong resistance of noise,no peripheral chip,etc.Visual studio 2005 is used to design the system s softwa...中文文摘：论述了通过RS-232总线和Intranet网络,来实现对远端的离子泵电源的监测与控制。系统硬件VAC800由TI公司的MSP430F149混合信号处理器和UA7000A网络模块构成。MSP430F149具有超低功耗和高集成度等优点,利用它构建的离子泵电源监控系统功能强大,结构简单,可靠性高,抗干扰能力强。系统软件采用visual studio 2005设计。本监控系统能够很好地完成对加速器离子泵电源监视与控制。

Silicon Surface Modification with a Mixed Silanes Layer to Immobilize Proteins for Biosensor with Imaging Ellipsometry

One kind of surface modification method on silicon wafer was presented in this paper. A mixed silanes layer was used to modify silicon surface and rendered the surface medium hydrophobic. The mixed silanes layer contained two kinds of compounds, aminopropyltriethoxysilane (APTES) and methyltriethoxysilane (NITES). A few of APTES molecules in the layer was used to immobilize covalently human immunoglobulin G (IgG) on the silicon surface. The human IgG molecules immobilized covalently on the modified surface could retain their structures well and bind more antibody molecules than that on silicon surface modified with only APTES. This kind of surface modification method effectively improved the sensitivity of the biosensor with imaging ellipsometry.

Immunosensor Interface Based on Physical and Chemical Immunogylobulin G Adsorption onto Mixed Self-Assembled Monolayers

An immunosensor interface based on mixed hydrophobic self-assembled monolayers (SAMs) of methyl and carboxylic acid terminated thiols with covalently attached human Immunoglobulin G (hIgG), is investigated. The densely packed and organised SAMs were characterised by contact angle measurements and cyclic voltammetry. The effect of the non-ionic surfactant, Tween 20, in preventing nonspecific adsorption is addressed by ellipsometry during physical and covalent hIgG immobilization on pure and mixed SAMs, respectively. It is clearly demonstrated that nonspecific adsorption due to hydrophobic interactions of hIgG on methyl ended groups is totally inhibited, whereas electrostatic/hydrogen bonding interactions with the exposed carboxylic groups prevail in the presence of surfactant. Results of ellipsometry and Atomic Force Microscopy, reveal that the surface concentration of covalently immobilized hIgG is determined by the ratio of COOH/CH3-terminated thiols in SAM forming solution. Moreover, the ellipsometric data demonstrates that the ratio of bound anti-hIgG/hIgG depends on the density of hIgG on the surface and that the highest ratio is close to three. We also report the selectivity and high sensitivity achieved by chronoamperometry in the detection of adsorbed hIgG and the reaction with its antibody.

Computation of stress intensity factors by the sub-region mixed finite element method of lines

Based on the sub-region generalized variational principle, a sub-region mixed version of the newly-developed semi-analytical 'finite element method of lines' (FEMOL) is proposed in this paper for accurate and efficient computation of stress intensity factors (SIFs) of two-dimensional notches/cracks. The circular regions surrounding notch/crack tips are taken as the complementary energy region in which a number of leading terms of singular solutions for stresses are used, with the sought SIFs being among the unknown coefficients. The rest of the arbitrary domain is taken as the potential energy region in which FEMOL is applied to obtain approximate displacements. A mixed system of ordinary differential equations (ODEs) and algebraic equations is derived via the sub-region generalized variational principle. A singularity removal technique that eliminates the stress parameters from the mixed equation system eventually yields a standard FEMOL ODE system, the solution of which is no longer singular and is simply and efficiently obtained using a standard general-purpose ODE solver. A number of numerical examples, including bi-material notches/cracks in anti-plane and plane elasticity, are given to show the generally excellent performance of the proposed method.

Numerical analysis of spatial evolution of the small signal gain in a chemical oxygen-iodine laser operating without primary buffer gas

A chemical oxygen iodine laser (COIL) that operates without primary buffer gas has become a new way of facilitating the compact integration of laser systems. To clarify the properties of spatial gain distribution, three-dimensional (3-D) computational fluid dynamics (CFD) technology was used to study the mixing and reactive flow in a COIL nozzle with an interleaving jet configuration in the supersonic section. The results show that the molecular iodine fraction in the secondary flow has a notable effect on the spatial distribution of the small signal gain. The rich iodine condition produces some negative gain regions along the jet trajectory, while the lean iodine condition slows down the development of the gain in the streamwise direction. It is also found that the new configuration of an interleaving jet helps form a reasonable gain field under appropriate operation conditions. (c) 2007 Elsevier Ltd. All rights reserved.

The mixed-type integral equations for transient elastodynamic plane crack problems

In the present paper, by use of the boundary integral equation method and the techniques of Green fundamental solution and singularity analysis, the dynamic infinite plane crack problem is investigated. For the first time, the problem is reduced to solving a system of mixed-typed integral equations in Laplace transform domain. The equations consist of ordinary boundary integral equations along the outer boundary and Cauchy singular integral equations along the crack line. The equations obtained are strictly proved to be equivalent with the dual integral equations obtained by Sih in the special case of dynamic Griffith crack problem. The mixed-type integral equations can be solved by combining the numerical method of singular integral equation with the ordinary boundary element method. Further use the numerical method for Laplace transform, several typical examples are calculated and their dynamic stress intensity factors are obtained. The results show that the method proposed is successful and can be used to solve more complicated problems.

Growth of zero-mean-shear turbulent-mixed layer with suspended particles in a 2-layer fluid system

The growth behaviour of zero-mean-shear turbulent-mixed layer containing suspended solid particles has been studied experimentally and analysed theoretically in a two-layer fluid system. The potential model for estimating the turbulent entrainment rate of the mixed layer has also been suggested, including the results of the turbulent entrainment for pure two-layer fluid. The experimental results show that the entrainment behaviour of a mixed layer with the suspended particles is well described by the model. The relationship between the entrainment distance and the time, and the variation of the dimensionless entrainment rate E with the local Richardson number Ri1 for the suspended particles differ from that for the pure two-layer fluid by the factors-eta-1/5 and eta-1, respectively, where eta = 1 + sigma-0-DELTA-rho/DELTA-rho-0.