314 resultados para SILICON-ON-INSULATOR


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Effects of techniques of implanting nitrogen into buried oxide on the characteristics of the partially depleted silicon-on-insulator (SOI) p-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs) have been studied with three different nitrogen implantation doses, 8 x 10(15), 2 x 10(16), and 1 x 10(17) cm(-2). The experimental results show that this technology can affect the threshold voltage, channel hole mobility and output characteristics of the partially depleted SOI PMOSFETs fabricated with the given material and process. For each type of the partially depleted SOI PMOSFET with nitrided buried oxide, the absolute value of the average threshold voltage increases due to the nitrogen implantation. At the same time, the average channel hole mobility decreases because of the nitrogen implantation. In particular, with the high nitrogen implantation doses, the output characteristic curves of the tested transistors present a distinct kink effect, which normally exists in the characteristic output curves of only partially depleted SOI NMOSFETs.

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A novel method to fabricate a thermally tunable filter with a tuning range of 26 nm from 1.504 to 1.530 mum is reported. The high-reffectivity bottom mirror is deposited in the hole formed by anisotropically etching in the basic solution from the backside of the slice with the buried SiO2 layer in silicon-on-insulator substrate as the etching-stop layer. Because of the formation of the mesa and the removing of the substrate of the hole, the power from the metal heater can be more effectively consumed in the crystalline silicon cavity. So it lowers the power consumption and the filter has a higher tuning range. (C) 2004 Elsevier B.V. All rights reserved.

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The effects, caused by the process of the implantation of nitrogen in the buried oxide layer of SIMOX wafer, on the characteristics of partially depleted silicon-on-insulator nMOSFET have been studied. The experimental results show that the channel electron mobilities of the devices fabricated on the SIMON (separation by implanted oxygen and nitrogen) wafers are lower than those of the devices made on the SIMOX (separation by implanted oxygen) wafers. The devices corresponding to the lowest implantation dose have the lowest mobility within the range of the implantation dose given in this paper. The value of the channel electron mobility rises slightly and tends to a limit when the implantation dose becomes greater. This is explained in terms of the rough Si/SiO2 interface due to the process of implantation of nitrogen. The increasing negative shifts of the threshold voltages for the devices fabricated on the SIMON wafers are also observed with the increase of implanting dose of nitrogen. However, for the devices fabricated on the SIMON wafers with the lowest dose of implanted nitrogen in this paper, their threshold voltages are slightly larger on the average than those prepared on the SIMOX wafers. The shifts are considered to be due to the increment of the fixed oxide charge in SiO2 layer and the change of the density of the interface-trapped charge with the value and distribution included. In particular, the devices fabricated on the SIMON wafers show a weakened kink effect, compared to the ones made on the SIMOX wafers.

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地址: Chinese Acad Sci, Inst Semicond, State Key Lab Integrated Optoelect, Beijing 100083, Peoples R China

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Novel folding 8 x 8 matrix switches based on silicon on insulator were demonstrated. In the design, single-mode rib waveguides and multimode interferences are connected by optimized tapered waveguides to reduce the mode coupling loss between the two types of waveguides. The self-aligned method was applied to the key integrated turning mirrors for perfect positions and low loss of them. A mixed etching process including inductively coupled plasma and chemical etching was employed to etch waveguides and mirrors, respectively. The compact size of the device is only 20 x 3.2 mm(2). The switch element with high switching speed and low power consumption is presented in the matrix. The average insertion loss of the matrix is about -21 dB, and the excess loss of one mirror is measured of -1.4 dB. The worst crosstalk is larger than 21 dB. Experimental results illuminate that some of the main characteristics of optical matrix switches are. developed in the modified design, which is in accord with theoretic analyses.

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Straight single-line defect optical waveguides in photonic crystal slabs are designed by the plane wave expansion method and fabricated into silicon-on-insulator (SOI) wafer by 248-nm deep UV lithography. We present an efficient way to measure the light transmission spectrum of the photonic crystal waveguide (PhC WG) at given polarization states. By employing the Mueller/Stokes method, we measure and analyse the light propagation properties of the PhC WG at different polarized states. It is shown that experimental results are in agreement with the simulation results of the three-dimensional finite-difference-time-domain method.

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We report on a Si1-xGex/Si multiple quantum-well resonant-cavity-enhanced (RCE) photodetector with a silicon-on-oxide reflector as the bottom mirror operating near 1.3 mu m. The breakdown voltage of the photodetector is above 18 V and the dark current density at 5 V reverse bias is 12 pA/mu m(2). The RCE photodetector shows enhanced responsivity with a clear peak at 1.285 mu m and the peak responsivity is measured around 10.2 mA/W at a reverse bias of 5 V. The external quantum efficiency at 1.3 mu m is measured to be 3.5% under reverse bias of 16 V, which is enhanced three- to fourfold compared with that of a conventional p-i-n photodetector with a Ge content of 0.5 reported in 1995 by Huang [Appl. Phys. Lett. 67, 566 (1995)]. (C) 2000 American Institute of Physics. [S0003-6951(00)00628-8].

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The increased emphasis on sub-micron CMOS/SOS devices has placed a demand for high quality thin silicon on sapphire (SOS) films with thickness of the order 100-200 nm. It is demonstrated that the crystalline quality of as-grown thin SOS films by the CVD method can be greatly improved by solid phase epitaxy (SPE) process: implantation of self-silicon ions and subsequent thermal annealing. Subsequent regrowth of this amorphous layer leads to a greater improvement in silicon layer crystallinity and channel carrier mobility, evidenced, respectively, by double crystal X-ray diffraction and electrical measurements. We concluded that the thin SPE SOS films are suitable for application to high-performance CMOS circuitry. (C) 2000 Elsevier Science S.A. All rights reserved.

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We present fabrication and experimental measurement of a series of photonic crystal waveguides and coupled structure of PC waveguide and PC micro-cavity. The complete devices consist of an injector taper down from 3 mu m into a triangular-lattice air-holes single-line-defect waveguide. We fabricated these devices on a silicon-on-insulator substrate and characterized them using tunable laser source. We've obtained high-efficiency light propagation and broad flat spectrum response of photonic-crystal waveguides. A sharp attenuation at photonic crystal waveguide mode edge was observed for most structures. The edge of guided band is shifted about 31 nm with the 10 nm increase of lattice constant. Mode resonance was observed in coupled structure. Our experimental results indicate that the optical spectra of photonic crystal are very sensitive to structure parameters.

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A compact polarization-insensitive 8x8 arrayed waveguide grating with 100GHz channel spacing at 1.55 mu m is presented on the material of silicon on insulator (SOI). Increasing the epitaxial layer thickness can reduce the birefringence of the waveguide, but the wvaeguide's bend radius also increases at the same time. We choose the SOI wafer with 3.0 mu m epitaxial layer to reduce the device's size and designed the appropriate structure of rib wave-guides to eliminate the polarization dependant wavelength shift. Compared to the other methods of eliminating the polarization dependant wavelength shift, the method is convenient and easy to control the polarization without additional etching process. The index differences between TE0 and TM0 of straight and bend waveguides are 1.4x10(-5) and 3.9x10(-5), respectively. The results showed that the polarization dependant wavelength shift is 0.1nm, and the device size is 1.5x1.0 cm(2).

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During the packaging of optoelectrome device, a problem always met is the instability of output power. The main effect causing this problem, Fabry-Perot interference, is discussed in this paper. Both theoretical analysis and experimental test are carried out and in good agreement. As an example of avoiding the disadvantage of Fabry-Perot interference, the packaging process of Silicon-on-Insulator (SOI) based Variable Optical Attenuator(VOA) is shown at last.

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Ge-on-silicon-on-insulator p-i-n photodetectors were fabricated using an ultralow-temperature Ge buffer by ultrahigh-vacuum chemical vapor deposition. For a detector of 70-mu m diameter, the 1-dB small-signal compression power was about 110.5 mW. The 3-dB bandwidth at 3-V reverse bias was 13.4 GHz.

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An LCAO-scheme taking into account 10 atomic orbitals (s-, p-, and d-type) is used to calculate the electronic structure of the reconstructed 90-degrees partial dislocation in Si. Two different valence force fields producing deviating results are used for modelling the core structure. Geometrical data published by another group is also used. The aim is to explore the influence of geometry on energy levels. We find that the band structure depends sensitively on bond angles. Using data determined by the Tersoff potential we obtain two bands of which the upper one penetrates deeply into the indirect band gap while the geometry minimizing the simple Keating potential leaves the gap completely clear of dislocation states. Thus, from a theoretical point of view, the chief difficulty in calculating the electronic structure of the reconstructed 90-degrees partial is the lack of accurate structural information.