118 resultados para Jernström Offset
Resumo:
Polarization-independent laterally-coupled micro-ring resonator has been designed and demonstrated. The origin of the polarization-sensitivity of the photonic wire waveguide (PWW) was analyzed. A polarization-insensitive PWW structure was designed and a polarization-insensitive MRR based on this PWW structure was designed by finite difference time-domain method and was fabricated on an 8-inch silicon-on-insulator wafer. The offset between the resonant wavelengths of the quasi-TE mode and the quasi-TM mode is smaller than 0.15 nm. The FSR is about 17 nm, extinction ratio about 10 dB and Q about 620.
Resumo:
This paper presents experimental results of an analog baseband circuit for China Multimedia Mobile Broadcasting (CMMB) direct conversion receiver in 0.35um SiGe BiCMOS process. It is the first baseband of CMMB RFIC reported so far. A 8(th)-order chebyshev low pass filter (LPF) with calibration system is used in the analog baseband circuit, the filter provides 0.5 dB passband ripple and -35 dB attenuation at 6MHz with the cutoff frequency at 4MHz, the calibration of filter is reported to achieve the bandwidth accuracy of 3%. The baseband variable gain amplifier (VGA) achieves more than 40 dB gain tuning with temperature compensation. In addition, A DC offset cancellation circuit is also introduced to remove the offset from layout and self-mixing, and the remaining offset voltage and current consumption are only 6mV and 412uA respectively. Implemented in a 0.35um SiGe technology with 1.1 mm(2) die size, this tuner baseband achieves OIP3 of 25.5 dBm and dissipate 16.4 mA under 2.8-V supply.
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This paper presents a wide tuning range CMOS frequency synthesizer for dual-band GPS receiver, which has been fabricated in a standard 0.18-um RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45GHz and 3.14GHz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8mA to 0.4mA, from a 1.8V supply voltage. The measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mW working at L I band with in-band phase noise less than -82dBc/Hz and out-of-band phase noise about -112 dBc/Hz at 1MHz offset from a 3.142GHz carrier.
Resumo:
In this paper, a wide-band low noise amplifier, two mixers and a VCO with its buffers implemented in 50GHz 0.35 mu m SiGe BiCMOS technology for dual-conversion digital TV tuner front-end is presented. The LNA and up-converting mixer utilizes current injection technology to achieve high linearity. Without using inductors, the LNA achieves 0.1-1GHz wide bandwidth and 18.8-dB gain with less than 1.4-dB gain variation. The noise figure of the LNA is less than 5dB and its 1dB compression point is -2 dBm. The IIP3 of two mixers is 25-dBm. The measurement results show that the VCO has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole chip consume 253mW power with 5-V supply.
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This paper represents a LC VCO with AAC (Auto Amplitude Control), in which PMOS FETs are used as active components, and the varactors are directly connected to ground to widen Kvco linear range. The AAC circuitry adds little noise to the VCO and provides it with robust performance over a wide temperature and carrier frequency range. The VCO is fabricated in 50-GHz 0.35-mu m SiGe BiCMOS process. The measurement results show that it has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole circuit draws 6.6-mA current from 5.0-V supply.
Resumo:
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.
Resumo:
This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthesizer. The technique accurately presets the frequency of VCO with small initial frequency error and greatly reduces the lock-in time. It can automatically compensate preset frequency variation with process and temperature. A 2.4GHz synthesizer with 1MHz reference input was implemented in 0.35 mu m CMOS process. The chip core area is 0.4mm(2). Output frequency of VCO ranges from 2390 to 2600MHz. The measured results show that the typical lock-in time is 3 mu s. The phase noise is -112dBc/Hz at 600KHz offset from center frequency. The test chip consumes current of 22mA that includes the consumption of the I/O buffers.
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In this paper, the detection wavelength and the electron-hole wave function overlap of InAs/IrxGa1-xSb type II superlattice photodetectors are numerically calculated by using the envelope function and the transfer matrix methods. The band offset is dealt with by employing the model solid theory, which already takes into account the lattice mismatch between InAs and InxGa1-xSb layers. Firstly, the detection wavelength and the wave function overlap are investigated in dependence on the InAs and InxGa1-xSb layer thicknesses, the In mole fraction, and the periodic number. The results indicate that the detection wavelength increases with increasing In mole fraction, InAs and InxGa1-xSb layer thicknesses, respectively. When increasing the periodic number, the detection wavelength first increases distinctly for small periodic numbers then increases very slightly for large period numbers. Secondly, the wave function overlap diminishes with increasing InAs and InxGa1-xSb layer thicknesses, while it enhances with increasing In mole fraction. The dependence of the wave function overlap on the periodic number shows the same trend as that of the detection wavelength on the periodic number. Moreover, for a constant detection wavelength, the wave function overlap becomes greater when the thickness ratio of the InAs over InxGa1-xSb is larger.
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n-ZnO/p-Si heterojunction light-emitting diodes (LEDs) show weak defect-related electroluminescence (EL). In order to analyze the origin of the weak EL, the energy band alignment and interfacial microstructure of ZnO/Si heterojunction are investigated by x-ray photoelectron spectroscopy. The valence band offset (VBO) is determined to be 3.15 +/- 0.15 eV and conduction band offset is -0.90 +/- 0.15 eV, showing a type-II band alignment. The higher VBO means a high potential barrier for holes injected from Si into ZnO, and hence, charge carrier recombination takes place mainly on the Si side rather than the ZnO layer. It is also found that a 2.1 nm thick SiOx interfacial layer is formed at the ZnO/Si interface. The unavoidable SiOx interfacial layer provides to a large number of nonradiative centers at the ZnO/Si interface and gives rise to poor crystallinity in the ZnO films. The weak EL from the n-ZnO/p-Si LEDs can be ascribed to the high ZnO/Si VBO and existence of the SiOx interfacial layer.
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X-ray photoelectron spectroscopy has been used to measure the valence band offset (VBO) of the w-InN/h-BN heterojunction. We find that it is a type-II heterojunction with the VBO being -0.30 +/- A 0.09 eV and the corresponding conduction band offset (CBO) being 4.99 +/- A 0.09 eV. The accurate determination of VBO and CBO is important for designing the w-InN/h-BN-based electronic devices.
Resumo:
We have analyzed electronic transport through a single, 200-angstrom-thick, Ga0.74Al0.36As barrier embedded in GaAs. At low temperatures and high electric field, the Fowler-Nordheim regime is observed, indicating that the barrier acts as insulating layers. At higher temperatures the thermionic regime provides an apparent barrier height, decreasing with the field, which is equal to the expected band offset when extrapolated to zero field. However, for some samples, the current is dominated by the presence of electron traps located in the barrier. A careful analysis of the temperature and field behavior of this current allows to deduce that the mechanism involved is field-enhanced emission from electron traps. The defects responsible are tentatively identified as DX centers, resulting from the contamination of the barrier by donor impurities.
Resumo:
We have measured low-temperature photoluminescence (PL) and optical absorption spectra of an In0.2Ga0.8As/GaAs multiple quantum well (MQW) structure at pressures up to 8 GPa. Below 4.9 GPa, PL shows only the emission of the n = 1 heavy-hole (HH) exciton. Three new X-related PL bands appear at higher pressures. They are assigned to spatially indirect (type-II) and direct (type-I) transitions from X(Z) states in GaAs and X(XY) valleys of InGaAs, respectively, to the HH subband of the wells. From the PL data we obtain a valence band offset of 80 meV for the strained In0.2Ga0.8As/GaAs MQW system. Absorption spectra show three features corresponding to direct exciton transitions in the quantum wells. In the pressure range of 4.5 to 5.5 GPa an additional pronounced feature is apparent in absorption, which is attributed to the pseudo-direct transition between a HH subband and the folded X(Z) states of the wells. This gives the first clear evidence for an enhanced strength of indirect optical transitions due to the breakdown of translational invariance at the heterointerfaces in MQWs.
Resumo:
We have measured low-temperature photoluminescence (PL) and absorption spectra of In0.2Ga0.8As/GaAs multiple quantum wells (MQW's) under hydrostatic pressures up to 8 GPa. In PL, only a single peak is observed below 4.9 GPa corresponding to the n = 1 heavy-hole (HH) exciton in the InxGa1-xAs wells. Above 4.9 GPa, new PL lines related to X-like conduction band states appear. They are assigned to the type-II transition from the X(Z) states in GaAs to the HH subband of the InxGa1-xAs wells and to the zero-phonon line and LO-phonon replica of the type-I transition involving the X(XY) valleys of the wells. In addition to absorption peaks corresponding to direct exciton transitions in the wells, a new strong absorption feature is apparent in spectra for pressures between 4.5 and 5.5 GPa. This absorption is attributed to the pseudodirect transition between the HH subband and the X, state of the wells. This gives clear evidence for an enhanced strength of indirect optical transitions due to the breakdown of translational invariance in MQW structures. From experimental level splittings we determine the valence band offset and the shear deformation potential for X states in the In0.2Ga0.8As layer.
Resumo:
This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well.
Resumo:
This paper presents an LC VCO with auto-amplitude control (AAC), in which pMOS FETs are used,and the varactors are directly connected to ground to widen the linear range of Kvco. The AAC circuitry adds little noise to the VCO but provides it with robust performance over a wide temperature and carrier frequency range.The VCO is fabricated in a chartered 50GHz 0.35μm SiGe BiCMOS process. The measurements show that it has - 127. 27dBc/Hz phase noise at 1MHz offset and a linear gain of 32.4MHz/V between 990MHz and 1.14GHz.The whole circuit draws 6. 6mA current from 5V supply.