Compact 3-dB tapered multimode interference coupler in silicon-on-insulator

We have fabricated a compact 3-dB multimode interference coupler with a large silicon-on-insulator cross section. To reduce the length of the usual symmetric interference multimode interference coupler, we propose using a parabolically tapered structure. The length of the device is 398 mum. The device has a uniformity of 0.28 dB. (C) 2001 Optical Society of America.

Silicon-on-insulator based 2 x 2 multimode interference coupler with large tolerance

We demonstrate a type of 2 x 2 multimode interference 3 dB coupler based on silicon-on-insulator. The fabrication tolerance was investigated by the effective index method and the guide mode method. The devices with different lengths were fabricated and near-held output images were obtained. Tolerances to width, length and etch depth are 2, 200 and 2 mum, respectively. The devices show a uniform power distribution.

The new exploration for proton-implanted silicon: the conversion of a surface-region-purification-induced p-n junction into a p-i-n electrical structure approaching silicon on insulator

A surface-region-purification-induced p-n junction, a puzzle discovered at Brookhaven National Laboratory, in a silicon-on-defect-layer (SODL) material has been explored by carrying out various annealing conditions and subsequent measurements on electrical properties. The origin of the pn junction has been experimentally investigated. Furthermore, the p-n junction has been transformed into a p-i-n electrical structure by adding a high temperature annealing process to the previously used SODL procedure, making the SODL material approach silicon on insulator (SOI). The control of the initial oxygen amount in the silicon material is suggested to be critical for the experimental results.

Polarization-Independent Micro-Ring Resonator on Silicon-on-Insulator

Polarization-independent laterally-coupled micro-ring resonator has been designed and demonstrated. The origin of the polarization-sensitivity of the photonic wire waveguide (PWW) was analyzed. A polarization-insensitive PWW structure was designed and a polarization-insensitive MRR based on this PWW structure was designed by finite difference time-domain method and was fabricated on an 8-inch silicon-on-insulator wafer. The offset between the resonant wavelengths of the quasi-TE mode and the quasi-TM mode is smaller than 0.15 nm. The FSR is about 17 nm, extinction ratio about 10 dB and Q about 620.

High Q microring resonator in silicon-on-insulator rib waveguides - art. no. 68380J

A high quality (Q) factor microring resonator in silicon-on-insulator rib waveguides was fabricated by electron beam lithography, followed by inductively coupled plasma etching. The waveguide dimensions were scaled down to submicron, for a low bending loss and compactness. Experimentally, the resonator has been realized with a quality factor as high as 21,200, as well as a large extinction ratio 12.5dB at telecommunication wavelength near 1550nm. From the measured results, propagation loss in the rib waveguide is determined as low as 6.900/cm. This high Q microring resonator is expected to lead to high speed optical modulators and bio-sensing devices.

High efficiency fiber to waveguide optical coupler in silicon-on-insulator-based slot waveguides - art. no. 68310R

We propose a novel optical fiber-to-waveguide coupler for integrated optical circuits. The proper materials and structural parameters of the coupler, which is based on a slot waveguide, are carefully analyzed using a full-vectorial three dimensional mode solver. Because the effective refractive index of the mode in a silicon-on-insulator-based slot waveguide can be extremely close to that of the fiber, a highly efficient fiber-to-waveguide coupling application can be realized. For a TE-like mode, the calculated minimum mismatch loss is about 1.8dB at 1550nm, and the mode conversion loss can be less than 0.5dB. The discussion of the present state-of-the-art is also involved. The proposed coupler can be used in chip-to-chip communication.

Ultra-compact silicon-on-insulator optical filter based on sidewall Bragg grating

Micro-cavity structure composed of silicon wire with 240nm square cross section and two symmetrical sidewall waveguide Bragg gratings is fabricated and studied for the operation under telecommunication wavelengths. Optical filter of quasi-TE mode was realized based on this cavity. In such micro-cavity, optical quality factor (Q) was measured up to 380 with a 4.8nm free spectral range (FSR) and 12dB fringe contrast (FC). The measured group index of silicon waveguide with only 240nm square cross section was between 3.80 and 5.43. It is the first time group delay of silicon wire waveguide with such small core dimension is studied. Larger group delay can be expected after optimizing the design parameters and the fabrication process.

Design and Fabrication of a Photonic Crystal Channel Drop Filter Based on an Asymmetric Silicon-on-Insulator Slab

We report on the design and fabrication of a photonic crystal (PC) channel drop filter based on an asymmetric silicon-on-insulator (SOI) slab. The filter is composed of two symmetric stick-shape micro-cavities between two single-line-defect (W1) waveguides in a triangular lattice, and the phase matching condition for the filter to improve the drop efficiency is satisfied by modifying the positions and radii of the air holes around the micro-cavities. A sample is then fabricated by using electron beam lithography (EBL) and inductively coupled plasma (ICP) etching processes. The measured 0 factor of the filter is about 1140, and the drop efficiency is estimated to be 73% +/- 5% by fitting the transmission spectrum.

Theoretical and Experimental Studies of an Ultra-compact Photonic Crystal Corner Mirror Based on Silicon-On-Insulator

An ultra-compact silicon-on-insulator based photonic crystal corner mirror is designed and optimized. A sample is then successfully fabricated with extra losses 1.1 +/- 0.4dB for transverse-electronic (M) polarization for wavelength range of 1510-1630nm.

Silicon-on-insulator based optical waveguide and integrated switch matrix

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Design and Simulation Analysis of Spot-Size Converter in Silicon-On-Insulator

Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-06-04T08:02:20Z No. of bitstreams: 1 Design and Simulation Analysis of Spot-Size Converter in Silicon-On-Insulator.pdf: 239163 bytes, checksum: 82db1386c266d0c07442a972348da08c (MD5)

High-Q and High-extinction-ratio Microdisk Add-drop Filter with Grating Couplers in Silicon-on-Insulator

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A NEW TYPE OF SILICON-ON-INSULATOR WITH A PERFECT SURFACE SILICON LAYER

A novel silicon structure consisting of a silicon-on-defect layer (SODL), with enhanced surface Hall mobility in the surface layer on a buried defect layer (DL), has been discovered [J. Li, Nucl. Instr. and Meth. B59/60 (1991) 1053]. SODL material was formed by using proton implantation and subsequent two-step annealing. The implantation was carried out with a Varian 350D ion implanter. Based on the discovery, a standard measurement method (current-voltage curve method) was adopted to measure the true resistivity value of the DL in order to replace the spreading resistivity measurement by which the true resistivity in seriously defective silicon cannot be obtained. By adopting the current-voltage current method, the true resistivity value of the DL is measured to be 4.2 x 10(9) OMEGA cm. The SODL material was proved to be a silicon-on-insulator substrate.

TRANSMISSION ELECTRON-MICROSCOPY STUDY OF N+-IMPLANTED SILICON ON INSULATOR BY ENERGY-FILTERED IMAGING

We report on the first study of N+ -implanted silicon on insulator by energy-filtered imaging using an Opton electron microscope CEM 902 equipped Castaing-Henry electron optical system as a spectrometer. The inelastic images, energy window set at DELTA-E = 16 eV and DELTA-E = 25 eV according to plasmon energy loss of crystal Si and of silicon nitride respectively, give much structure information. The interface between the top silicon layer and the upper silicon nitride layer can be separated into two sublayers.