pessimistic predicate/transform model for long running business processes

Many business processes in enterprise applications are both long running and transactional in nature. However, no current transaction model can provide full transaction support for such long running business processes. This paper proposes a new transaction model, the pessimistic predicate/transform (PP/T) model, which can provide full transaction support for long running business processes. A framework was proposed on the enterprise JavaBeans platform to implement the PP/T model. The framework enables application developers to focus on the business logic, with the underlying platform providing the required transactional semantics. The development and maintenance effort are therefore greatly reduced. Simulations show that the model has a sound concurrency management ability for long running business processes.

High-Saturation-Power and High-Speed Ge-on-SOI p-i-n Photodetectors

Ge-on-silicon-on-insulator p-i-n photodetectors were fabricated using an ultralow-temperature Ge buffer by ultrahigh-vacuum chemical vapor deposition. For a detector of 70-mu m diameter, the 1-dB small-signal compression power was about 110.5 mW. The 3-dB bandwidth at 3-V reverse bias was 13.4 GHz.

A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC

This paper presents a high speed ROM-less direct digital frequency synthesizer (DDFS) which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS.The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic (CML) is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm~2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0 ℃.

Recent Progress in Silicon Electro-optic Modulators for High Speed Applications

Silicon-based high-speed electro-optical modulator is the key component of silicon photonics for future communiction and interconnection systems. In this paper, introduced are the optical mudulation mechanisms in silicon, reviewed are some recent progresses in high-speed silicon modulators, and analyzed are advantages and shortages of the silicon modulators of different types.

A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver

The design and fabrication of a high speed, 12-channel monolithic integrated CMOS optoelectronic integrated circuit(OEIC) receiver are reported.Each channel of the receiver consists of a photodetector,a transimpedance amplifier,and a post-amplifier.The double photodiode structure speeds up the receiver but hinders responsivity.The adoption of active inductors in the TIA circuit extends the-3dB bandwidth to a higher level.The receiver has been realized in a CSMC 0.6μm standard CMOS process.The measured results show that a single channel of the receiver is able to work at bit rates of 0.8～1.4Gb/s. Altogether, the 12-channel OEIC receiver chip can be operated at 15Gb/s.

Fabrication of an AlAs/In0.53Ga0.47As/InAs Resonant Tunneling Diode on InP Substrate for High-Speed Circuit Applications

A high performance AlAs/In0.53 Ga0.47 As/InAs resonant tunneling diode （RTD） on InP substrate is fabricated by inductively coupled plasma etching. This RTD has a peak-to-valley current ratio （PVCR） of 7. 57 and a peak current density Jp = 39.08kA/cm^2 under forward bias at room temperature. Under reverse bias, the corresponding values are 7.93 and 34.56kA/cm^2 . A resistive cutoff frequency of 18.75GHz is obtained with the effect of a parasitic probe pad and wire. The slightly asymmetrical current-voltage characteristics with a nominally symmetrical structure are also discussed.

High Speed VCSEL-Based Parallel Optical Transmission Modules

Design and fabrication of a parallel optical transmitter are reported. The optimized 12 channel parallel optical transmitter,with each channel＇s data rate up to 3Gbit/s,is designed, assembled, and measured. A top-emitting 850nm vertical cavity surface emitting laser（VCSEL） array is adopted as the light source,and the VCSEL chip is directly wire bonded to a 12 channel driver IC. The outputs of the VCSEL array are directly butt coupled into a 12 channel fiber array. Small form factor pluggable （SFP） packaging technology is used in the module to support hot pluggable in application. The performance results of the module are demonstrated. At an operating current of 8mA, an eye diagram at 3Gbit/s is achieved with an optical output of more than 1mW.

High-speed electrooptical VOA integrated in silicon-on-insulator

In this paper, we present simulation results of an electrooptical variable optical attenuator (VOA) inte-grated in silicon-on-insulator waveguide. The device is functionally based on free carriers absorption toachieve attenuation. Beam propagation method (BPM) and two-dimensional semiconductor device simu-lation tool PISCES-Ⅱ were used to analyze the dc and transient characteristics of the device. The devicehas a response time (including rise time and fall time) less than 200 ns, much faster than the thermoopticand micro-electromechanical systems (MEMSs) based VOAs.

High-speed DFB laser and EMLs

High speed reliable 1.55 mum AlGaInAs multi-quantum well ridge waveguide (RW) DFB laser is developed with a 9GHz -3dB bandwidth. A high speed self aligned constricted mesa 1.55 mum DFB laser is achieved with a 9.1GHz -3dB bandwidth and a more than 20mW output power. A cost effective single RW electroabsorption modulated DFB laser (EMLs) is proposed and successfully fabricated by adopting selective area growth techniques:. a penalty free transmission at 2.5Gbps over 280Km normal G.652 single mode fiber is realized by using this EML as light source. For achieving a better performance EMLs. a gain-coupled DFB laser with etched quantum wells is successfully integrated with a electroabsorption modulator (EAM) for a high single mode yield. the wavelength of a EML is tuned in a 3.2nm range by a integrated thin-film heater for the wavelength routing. a buried heterostructure DFB laser is also successfully integrated with a RW EAM for a lower threshold current. lower EAM parasitic capacitance and higher output power.

Investigation on integrated high speed DFB light source and narrow bandwidth RCE photodetector for WDM fiber communication network application

Electroabsorption (EA) modulator integrated with partially gain coupling distributed feedback (DFB) lasers have been fabricated and shown high single mode yield and wavelength stability. The small signal bandwidth is about 7.5 GHz. Strained Si1-chiGechi/Si multiple quantum well (MQW) resonant-cavity enhanced (RCE) photodetectors with SiO2/Si distributed Bragg reflector (DBR) as the mirrors have been fabricated and shown a clear narrow bandwidth response. The external quantum efficiency at 1.3 mum is measured to be about 3.5% under reverse bias of 16 V. A novel GaInNAs/GaAs MQW RCE p-i-n photodetector with high reflectance GaAs/ALAs DBR mirrors has also been demonstrated and shown the selectively detecting function with the FWHM of peak response of 12 nm.

A new half-flash architecture for high speed video ADC

In this paper a new half-flash architecture for high speed video ADC is presented. Based on a high speed single-way analog switch circuit, this architecture effectively reduces the number of elements. At the same lime no sacrifice of speed is needed compared with the normal half-flash structure.

An analysis of the performance of a new high-speed single-way analog switch

This paper introduces a new highspeed single-way analog switch which has both highspeed high-resolution mono-direction analog transmission gate function and high-speed digital logic gate function with normal bipolar technology. The analysis of static and transient switching performances as an analog transmission gate is emphasized in the paper. In order to reduce the plug-in effect on high-speed high-resolution systems, an optimum design scheme is also given. This scheme is to achieve accelerated dynamic response with very low bias power dissipation. The analysis of PSPICE simulation as well as the circuit test results confirms the feasibility of the scheme. Now, the circuit has been applied effectively to the designs of novel highspeed A/D and D/A converters.