An Accurate and Fast Behavioral Model for PLL Frequency Synthesizer Phase Noise/Spurs Prediction

This paper presents a behavior model for PLL Frequency Synthesizer. All the noise sources are modeled with noise voltages or currents in time-domain. An accurate VCO noise model is introduced, including both thermal noise and 1/f noise. The behavioral model can be co-simulated with transistor level circuits with fast speed and provides more accurate phase noise and spurs prediction. Comparison shows that simulation results match very well with measurement results.

An Ultra Low Power Non-volatile Memory in Standard CMOS Process for Passive RFID Tags

An ultra low power non-volatile memory is designed in a standard CMOS process for passive RFID tags. The memory can operate in a new low power operating scheme under a wide supply voltage and clock frequency range. In the charge pump circuit the threshold voltage effect of the switch transistor is almost eliminated and the pumping efficiency of the circuit is improved. An ultra low power 192-bit memory with a register array is implemented in a 0.18 mu M standard CMOS process. The measured results indicate that, for the supply voltage of 1.2 volts and the clock frequency of 780KHz, the current consumption of the memory is 1.8 mu A (3.6 mu A) at the read (write) rate of 1.3Mb/s (0.8Kb/s).

Self-consistent analysis of AlSb/InAs high electron mobility transistor structures

The influences of channel layer width, spacer layer width, and delta-doping density on the electron density and its distribution in the AlSb/InAs high electron mobility transistors (HEMTs) have been studied based on the self-consistent calculation of the Schrodinger and Poisson equations with both the strain and nonparabolicity effects being taken into account. The results show that, having little influence on the total two dimensional electron gas (2DEG) concentration in the channel, the HEMT's channel layer width has some influence on the electron mobility, with a channel as narrow as 100-130 angstrom being more beneficial. For the AlSb/InAs HEMT with a Te delta-doped layer, the 2DEG concentration as high as 9.1 X 10(12) cm(-2) can be achieved in the channel by enhancing the delta-doping concentration without the occurrence of the parallel conduction. When utilizing a Si delta-doped InAs layer as the electron-supplying layer of the AlSb/InAs HEMT, the effect of the InAs donor layer thickness is studied on the 2DEG concentration. To obtain a higher 2DEG concentration in the channel, it is necessary to use an InAs donor layer as thin as 4 monolayer. To test the validity of our calculation, we have compared our theoretical results (2DEG concentration and its distribution in different sub-bands of the channel) with the experimental ones done by other groups and show that our theoretical calculation is consistent with the experimental results.

IMPROVEMENT OF STRUCTURAL INSTABILITY OF THE ION-SENSITIVE FIELD-EFFECT TRANSISTOR (ISFET)

Three causes involved in the instability of the ISFET are proposed in this study. First, it is ascertained that hydroxyl group resident at the surface of the Si3N4 film or in the electrolyte solution is most active and subject to gain or loss of electrons. This is one of the main causes for ISFET structural instability. Secondly, the stability of the pH-sensitive FET varies with deposition conditions in the fabrication process of the ISFET. This proves to be another cause of ISFET instability. Thirdly, the pH of the measured solution varies with the measuring process and time, contributing to the instability, but is not a cause of the instability of the pH-ISFET itself. We utilized the technique of readjusting and controlling the ratio of hydroxyl groups to amine groups to enhance the stability of the ISFET. Our techniques to improve stability characteristics proved to be effective in practice.

Detection of Terahertz Photon by GaAs-Based Single Electron Transistor at Low Temperatures

A reproducible terahertz (THz) photocurrent was observed at low temperatures in a Schottky wrap gate single electron transistor with a normal-incident of a CH_3OH gas laser with the frequency 2. 54THz.The change of source-drain current induced by THz photons shows that a satellite peak is generated beside the resonance peak. THz photon energy can be characterized by the difference of gate voltage positions between the resonance peak and satellite peak. This indicates that the satellite peak exactly results from the THz photon-assisted tunneling. Both experimental results and theoretical analysis show that a narrow spacing of double barriers is more effective for the enhancement of THz response.

A Multi-Finger Si_(1-x)Ge_x/Si Heterojunction Bipolar Transistor for Wireless Power Amplifier Applications

A large area multi-finger configuration power SiGe HBT device(with an emitter area of about 880μm~2)was fabricated with 2μm double-mesa technology.The maximum DC current gain β is 214.The BV_(CEO) is up to 10V,and the BV_(CBO) is up to 16V with a collector doping concentration of 1×10~(17)cm~(-3) and collector thickness of 400nm.The device exhibits a maximum oscillation frequency f_(max) of 19.3GHz and a cut-off frequency f_T of 18.0GHz at a DC bias point of I_C=30mA and V_(CE)=3V.MSG(maximum stable gain)is 24.5dB,and U(Mason unilateral gain)is 26.6dB at 1GHz.Due to the novel distribution layout,no notable current gain fall-off or thermal effects are observed in the I-V characteristics at high collector current.

Design and Fabrication of Power Si1-xGex/Si Heterojunction Bipolar Transistor for Wireless Power Amplifier Applications

A multi-finger structure power SiGe HBT device （with an emitter area of about 166μm^2） is fabricated with very simple 2μm double-mesa technology. The DC current gain β is 144.25. The B-C junction breakdown voltage reaches 9V with a collector doping concentration of 1 × 10^17cm^-3 and a collector thickness of 400nm. Though our data are influenced by large additional RF probe pads, the device exhibits a maximum oscillation frequency fmax of 10.1GHz and a cut-off frequency fτ of 1.8GHz at a DC bias point of IC=10mA and VCE = 2.5V.

Potential light source for photonic integrated circuits based on the equilateral triangle resonator

The semiconductor microlasers based on the equilateral triangle resonator (ETR) can be fabricated from the edge-emitting laser wafer by dry-etching technique, and the directional emission can be obtained by connecting an output waveguide to one of the vertices of the ETR. We investigate the mode characteristics, especially the mode quality factor, for the ETR with imperfect vertices, which is inevitable in the real technique process. The numerical simulations show that the confined modes can still have a high quality factor in the ETR with imperfect vertices. We can expect that the microlasers is a suitable light source for photonic integrated circuits.

Silicon: the promising material for phontonic integrated circuits platform

The development of optical network demands integrated arid multiple functionality modules to lowing cost and acquire highly reliability. Among the various contender materials to be photonic integrated circuits platform, silicon exhibits dominant characteristics and is the most promising platform materials. The paper compares the characteristics of some candidate materials with silicon and reviews recent progress in silicon based photonic integration technology. Tile challenges to silicon for optical integration for optical networking application arc also indicated.

Behavior of Pentacene Initial Nucleation on Various Dielectrics and Its Effect on Carrier Transport in Organic Field-Effect Transistor

The influence of dielectric surface energy on the initial nucleation and the growth of pentacene films as well as the electrical properties of the pentacene-based field-effect transistors are investigated. We have examined a range of organic and inorganic dielectrics with different surface energies, such as polycarbonate/SiO2, polystyrene/SiO2, and PMMA/SiO2 bi-layered dielectrics and also the bare SiO2 dielectric. Atomic force microscopy measurements of sub-monolayer and thick pentacene films indicated that the growth of pentacene film was in Stranski-Kranstanow growth mode on all the dielectrics. However, the initial nucleation density and the size of the first-layered pentacene islands deposited on different dielectrics are drastically influenced by the dielectric surface energy. With the increasing of the surface energy, the nucleation density increased and thus the average size of pentacene islands for the first mono-layer deposition decreased. The performance of fabricated pentacene-based thin film transistors was found to be highly related to nucleation density and the island size of deposited Pentacene film, and it had no relationship to the final particle size of the thick pentacene film. The field effect mobility of the thin film transistor could be achieved as high as 1.38 cm(2)/Vs with on/off ratio over 3 x 10(7) on the PS/SiO2 where the lowest surface energy existed among all the dielectrics. For comparison, the values of mobility and on/off ratio were 0.42 cm(2)/Vs and 1 x 10(6) for thin film transistor deposited directly on bare SiO2 having the highest surface energy.

Observation of N-Shaped Negative Differential Resistance in GaAs-Based Modulation-Doped Field Effect Transistor with InAs Quantum Dots

N-shaped negative differential resistance (NDR) with a high peak-to-valley ratio (PVR) is observed in a GaAs-based modulation-doped field effect transistor (MODFET) with InAs quantum dots (QDs) in the barrier layer (QDFET) compared with a GaAs MODFET. The NDR is explained as the real-space transfer (RST) of high-mobility electrons in a channel into nearby barrier layers with low mobility, and the PVR is enhanced dramatically upon inserting the QD layer. It is also revealed that the QD layer traps holes and acts as a positively charged nano-floating gate after a brief optical illumination, while it acts as a negatively charged nano-floating gate and depletes the adjacent channel when charged by the electrons. The NDR suggests a promising application in memory or high-speed logic devices for the QDFET structure.

Hybrid metal-base transistor with base of sulfonated polyaniline and fullerene emitter

We demonstrate hybrid vertical architecture transistors that operate like metal-base transistors, using n-type silicon as the collector, sulfonated polyaniline as the base, and C-60 fullerene as the emitter. Electrical measurements suggest that the sulfonated polyaniline base effectively screens the emitter from electric field variations occurring in the collector leading to the metal-base transistor behavior.