Effect of film thickness and annealing on optical properties of TiO2 thin films and electrical characterization of MOS capacitors

Titanium dioxide (TiO2) thin films were deposited on glass and silicon (100) substrates by the sol-gel method. The influence of film thickness and annealing temperature on optical transmittance/reflectance of TiO2 films was studied. TiO2 films were used to fabricate metal-oxide-semiconductor capacitors. The capacitance-voltage (C-V), dissipation-voltage (D-V) and current-voltage (I-V) characteristics were studied at different annealing temperatures and the dielectric constant, current density and resistivity were estimated. The loss tangent (dissipation) increased with increase of annealing temperature.

Germanium MOS Capacitors with Hafnium Dioxide and Silicon Dioxide Dielectrics

Germanium (Ge) does not grow a suitable oxide for MOS devices. The Ge/dielectric interface is of prime importance to the operation of photo-detectors and scaled MOSTs. Therefore there is a requirement for deposited or bonded dielectric materials. MOS capacitors have been formed on germanium substrates with three different dielectric materials. Firstly, a thermally grown and bonded silicon dioxide (SiO2) layer, secondly, SiO2 deposited by atmospheric pressure CVD ‘silox’, and thirdly a hafnium oxide (HfO2) high-k dielectric deposited by atomic layer deposition (ALD). Ge wafers used were p-type 1 0 0 2 O cm. C–V measurements have been made on all three types of capacitors to assess the interface quality. ALD HfO2 and silox both display acceptable C–V characteristics. Threshold voltage and maximum and minimum capacitance values closely match expected values found through calculation. However, the bonded SiO2 has non-ideal C–V characteristics, revealing the presence of a high density of interface states. A H2/N2 post metal anneal has a detrimental effect on C–V characteristics of HfO2 and silox dielectrics, causing a shift in the threshold voltage and rise in the minimum capacitance value. In the case of hafnium dioxide, capacitor properties can be improved by performing a plasma nitridation of the Ge surface prior to dielectric deposition.

Defects in PN junctions and MOS capacitors observed using thermally stimulated current and capacitance measurements, videotape script /

Includes bibliographical references (p. 14).

A high-performance Si-based MOS electrooptic phase modulator with a shunt-capacitor configuration

A novel Si-based metal-oxide-semiconductor (MOS) electrooptic phase modulator including two shunt oxide layer capacitors integrated on a silicon-on-insulator (SOI) waveguide is simulated and analyzed. The refractive index near the two gate oxide layers is modified by the free carrier dispersion effect induced by applying a positive bias on the electrodes. The theoretical calculation of free carrier distribution coupled with optical guided mode propagation characteristics has been carried out. The influence of the structure parameters such as the width and the doping level of the active region are analyzed. A half-wave voltage V-pi = 4 V is demonstrated with an 8-mm active region length and a 4-mu m width of an inner rib under an accumulation mode. When decreasing the inner rib width to 1 mu m, the phase modulation efficiency is even higher, and the rise and fall times reach 50 and 40 ps, respectively, with a 1.0 x 10(17) cm(-3) doping level in the active region.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Lanthanum oxide nanostructured films synthesized using hot dense and extremely non-equilibrium plasma for nanoelectronic device applications

Lanthanum oxide (La2O3) nanostructured films are synthesized on a p-type silicon wafer by ablation of La2O3 pellet due to interaction with hot dense argon plasmas in a modified dense plasma focus (DPF) device. The nanostructured films are investigated using scanning electron microscopy (SEM), atomic force microscopy (AFM), and X-ray diffraction (XRD) spectra. SEM study shows the formation of nano-films having nano-size structures with the average nanostructures size ~25, ~53, and ~45 nm for one, two, and three DPF shots, respectively. The nanostructures sizes and morphology of nano-films are consistent between the AFM and SEM analyses. XRD spectra confirms nano-sized La2O3 with an average grain size ~34, ~51, and ~42 nm for one, two, and three DPF shots, respectively. The electrical properties such as current-voltage and capacitance-voltage (C-V) characteristics of the Al-La2O3-Si metal-oxide- semiconductor (MOS) capacitor structure are measured. The current conduction mechanism of the MOS capacitors is also demonstrated. The C-V characteristics are further used to obtain the electrical parameters such as the dielectric constant, oxide thickness, flat-band capacitance, and flat-band voltage of the MOS capacitors. These measurements demonstrate significantly lower leakage currents without any commonly used annealing or doping, thereby revealing a significant improvement of the MOS nanoelectronic device performance due to the incorporation of the DPF-produced La2O3 nano-films.

'Wet N2O oxidation' process and interface state density characterization of nanoscale nitrided SiO2 for flash memory application

In this paper we first present the 'wet N2O' furnace oxidation process to grow nitrided tunnel oxides in the thickness range 6 to 8 nm on silicon at a temperature of 800 degrees C. Electrical characteristics of MOS capacitors and MOSFETs fabricated using this oxide as gate oxide have been evaluated and the superior features of this oxide are ascertained The frequency response of the interface states, before and after subjecting the MOSFET gate oxide to constant current stress, is studied using a simple analytical model developed in this work.

Spectroscopic and electrical properties of SiO2 films prepared by simple and cost effective sol-gel process

Amorphous SiO2 thin films were prepared on glass and silicon substrates by cost effective sol-gel method. Tetra ethyl ortho silicate (TEOS) was used as the precursor material, ethanol as solvent and concentrated HCl as a catalyst. The films were characterized at different annealing temperatures. The optical transmittance was slightly increased with increase of annealing temperature. The refractive index was found to be 1.484 at 550 nm. The formation of SiO2 film was analyzed from FT-IR spectra. The MOS capacitors were designed using silicon (1 0 0) substrates. The current-voltage (I-V), capacitance-voltage (C-V) and dissipation-voltage (D-V) measurements were taken for all the annealed films deposited on Si (1 0 0). The variation of current density, resistivity and dielectric constant of SiO2 films with different annealing temperatures was investigated and discussed for its usage in applications like MOS capacitor. The results revealed the decrease of dielectric constant and increase of resistivity of SiO2 films with increasing annealing temperature. (C) 2010 Elsevier B.V. All rights reserved.

Effect of Post-Metallization Hydrogen Annealing on C-V Characteristic of Zirconia Grown Using Atomic Layer Deposition

Substantial amount of fixed charge present in most of the alternative gate dielectrics gives rise to large shifts in the flat-band voltage (VFB) and charge trapping and de-trapping causes hysterectic changes on voltage cycling. Both phenomena affect stable and reliable transistor operation. In this paper we have studied for the first time the effect of post-metallization hydrogen annealing on the C-V curve of MOS capacitors employing zirconia, one of the most promising gate dielectric. Samples were annealed in hydrogen ambient for up to 30 minutes at different temperatures ranging from room temperature to 400°C. C-V measurements were done after annealing at each temperature and the hysteresis width was calculated from the C-V curves. A minimum hysteresis width of ∼35 mV was observed on annealing the sample at 200°C confirming the excellent suitability of this dielectric

Effect of annealing temperature on electrical and nano-structural properties of sol-gel derived ZnO thin films

Zinc oxide (ZnO) thin films have been prepared on silicon substrates by sol-gel spin coating technique with spinning speed of 3,000 rpm. The films were annealed at different temperatures from 200 to 500 A degrees C and found that ZnO films exhibit different nanostructures at different annealing temperatures. The X-ray diffraction (XRD) results showed that the ZnO films convert from amorphous to polycrystalline phase after annealing at 400 A degrees C. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on pre-cleaned silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased with increasing annealing temperature. The oxide capacitance was measured at different annealing temperatures and different signal frequencies. The dielectric constant and the loss factor (tan delta) were increased with increase of annealing temperature.

Optical, electrical and dielectric properties of TiO(2)-SiO(2) films prepared by a cost effective sol-gel process

Titanium dioxide (TiO(2)) and silicon dioxide (SiO(2)) thin films and their mixed films were synthesized by the sol-gel spin coating method using titanium tetra isopropoxide (TTIP) and tetra ethyl ortho silicate (TEOS) as the precursor materials for TiO(2) and SiO(2) respectively. The pure and composite films of TiO(2) and SiO(2) were deposited on glass and silicon substrates. The optical properties were studied for different compositions of TiO(2) and SiO(2) sols and the refractive index and optical band gap energies were estimated. MOS capacitors were fabricated using TiO(2) films on p-silicon (1 0 0) substrates. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics were studied and the electrical resistivity and dielectric constant were estimated for the films annealed at 200 degrees C for their possible use in optoelectronic applications. (C) 2011 Elsevier B.V. All rights reserved.

Optical, electrical and structural characterization of ZnO:Al thin films prepared by a low cost sol-gel method

ZnO:Al thin films were prepared on glass and silicon substrates by the sol-gel spin coating method. The x-ray diffraction (XRD) results showed that a polycrystalline phase with a hexagonal structure appeared after annealing at 400 degrees C for 1 h. The transmittance increased from 91 to about 93% from pure ZnO films to ZnO film doped with 1 wt% Al and then decreased for 2 wt% Al. The optical band gap energy increased as the doping concentration was increased from 0.5 wt% to 1 wt% Al. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on silicon (100) substrates and electrical properties such as current versus voltage (I-V) and capacitance versus voltage (C-V) characteristics were studied. The electrical resistivity decreased and the leakage current increased with an increase of annealing temperature. The dielectric constant was found to be 3.12 measured at 1 MHz. The dissipation value for the film annealed at 300 degrees C was found to be 3.1 at 5 V. (C) 2011 Elsevier Ltd. All rights reserved.

Influence of Sn doping on structural, optical and electrical properties of ZnO thin films prepared by cost effective sol-gel process

Tin (Sn) doped zinc oxide (ZnO) thin films were synthesized by sol-gel spin coating method using zinc acetate di-hydrate and tin chloride di-hydrate as the precursor materials. The films were deposited on glass and silicon substrates and annealed at different temperatures in air ambient. The agglomeration of grains was observed by the addition of Sn in ZnO film with an average grain size of 60 nm. The optical properties of the films were studied using UV-VIS-NIR spectrophotometer. The optical band gap energies were estimated at different concentrations of Sn. The MOS capacitors were fabricated using Sn doped ZnO films. The capacitance-voltage (C-V), dissipation vs. voltage (D-V) and current-voltage (I-V) characteristics were studied and the electrical resistivity and dielectric constant were estimated. The porosity and surface area of the films were increased with the doping of Sn which makes these films suitable for opto-electronic applications. (C) 2012 Elsevier B.V. All rights reserved.