983 resultados para Complex Programmable Logic Device (CPLD)
Resumo:
The single electron transistor (SET) is a charge-based device that may complement the dominant metal-oxide-semiconductor field effect transistor (MOSFET) technology. As the cost of scaling MOSFET to smaller dimensions are rising and the the basic functionality of MOSFET is encountering numerous challenges at dimensions smaller than 10nm, the SET has shown the potential to become the next generation device which operates based on the tunneling of electrons. Since the electron transfer mechanism of a SET device is based on the non-dissipative electron tunneling effect, the power consumption of a SET device is extremely low, estimated to be on the order of 10^-18J. The objectives of this research are to demonstrate technologies that would enable the mass produce of SET devices that are operational at room temperature and to integrate these devices on top of an active complementary-MOSFET (CMOS) substrate. To achieve these goals, two fabrication techniques are considered in this work. The Focus Ion Beam (FIB) technique is used to fabricate the islands and the tunnel junctions of the SET device. A Ultra-Violet (UV) light based Nano-Imprint Lithography (NIL) call Step-and-Flash- Imprint Lithography (SFIL) is used to fabricate the interconnections of the SET devices. Combining these two techniques, a full array of SET devices are fabricated on a planar substrate. Test and characterization of the SET devices has shown consistent Coulomb blockade effect, an important single electron characteristic. To realize a room temperature operational SET device that function as a logic device to work along CMOS, it is important to know the device behavior at different temperatures. Based on the theory developed for a single island SET device, a thermal analysis is carried out on the multi-island SET device and the observation of changes in Coulomb blockade effect is presented. The results show that the multi-island SET device operation highly depends on temperature. The important parameters that determine the SET operation is the effective capacitance Ceff and tunneling resistance Rt . These two parameters lead to the tunneling rate of an electron in the SET device, Γ. To obtain an accurate model for SET operation, the effects of the deviation in dimensions, the trap states in the insulation, and the background charge effect have to be taken into consideration. The theoretical and experimental evidence for these non-ideal effects are presented in this work.
Resumo:
Liquid crystal properties make them useful for the development of security devices in applications of authentication and detection of fakes. Induced orientation of liquid crystal molecules and birefringence are the two main properties used in security devices. Employing liquid crystal and dichroic colorants, we have developed devices that show, with the aid of a polarizer, multiple images on each side of the device. Rubbed polyimide is used as alignment layer on each substrate of the LC cell. By rubbing the polyimide in different directions in each substrate it is possible to create any kind of symbols, drawings or motifs with a greyscale; the more complex the created device is, the more difficult is to fake it. To identify the motifs it is necessary to use polarized light. Depending on whether the polarizer is located in front of the LC cell or behind it, different motifs from one or the other substrate are shown. The effect arises from the dopant colour dye added to the liquid crystal, the induced orientation and the twist structure. In practice, a grazing reflection on a dielectric surface is polarized enough to see the effect. Any LC flat panel display can obviously be used as backlight as well.
Resumo:
Systems relying on fixed hardware components with a static level of parallelism can suffer from an underuse of logical resources, since they have to be designed for the worst-case scenario. This problem is especially important in video applications due to the emergence of new flexible standards, like Scalable Video Coding (SVC), which offer several levels of scalability. In this paper, Dynamic and Partial Reconfiguration (DPR) of modern FPGAs is used to achieve run-time variable parallelism, by using scalable architectures where the size can be adapted at run-time. Based on this proposal, a scalable Deblocking Filter core (DF), compliant with the H.264/AVC and SVC standards has been designed. This scalable DF allows run-time addition or removal of computational units working in parallel. Scalability is offered together with a scalable parallelization strategy at the macroblock (MB) level, such that when the size of the architecture changes, MB filtering order is modified accordingly
Resumo:
Esta tesis se centra en el estudio y desarrollo de dispositivos de aplicación basados en cristal líquido polimérico. Las propiedades de los cristales líquidos los hacen interesantes para su uso en el desarrollo de dispositivos de seguridad para autenticación de productos y marcas, y detección y prevención de falsificaciones. Asimismo, pueden ser muy útiles para fabricar dispositivos basados en CLs dispersos en polímero, los cuales tienen a su vez múltiples aplicaciones. La orientación de las moléculas de cristal líquido y la birrefringencia son las dos características principales que afectan a las propiedades de estos dispositivos. Un dispositivo de cristal líquido estándar consiste en un sándwich formado por dos sustratos de vidrio transparente, dotados con electrodo de ITO (Indium Tin Oxide) en su superficie interna, que confinan el cristal líquido en su interior. En la primera parte de esta tesis se describen las características más importantes que describen una célula de cristal líquido. Esta introducción básica en necesaria para la correcta comprensión de los capítulos posteriores en los que se detalla el desarrollo concreto de los dispositivos desarrollados en la investigación llevada a cabo. Por ejemplo, en el caso de los dispositivos de seguridad se han eliminado los sustratos de vidrio (en la última fase de su desarrollo) para conseguir dispositivos flexibles. En la segunda parte de la tesis se incluye la descripción completa de los dispositivos fabricados, así como de los protocolos de fabricación seguidos y diseñados específicamente para ello. También se detallan en esta parte los resultados obtenidos, así como las propiedades ópticas y electroópticas en cada caso, y el/los equipos de caracterización utilizados. Utilizando cristal líquido nemático y colorante dicroico, se han desarrollado dispositivos que contienen múltiples imágenes latentes en cada cara del mismo. Utilizando distintas técnicas de alineamiento se consigue crear cualquier tipo de motivo latente, ya sean símbolos sencillos, figuras, logotipos o incluso imágenes con escala de gris. Cuanto más complejo es el dispositivo, mayor es la dificultad para reproducirlo en una eventual falsificación. Para visualizar e identificar los motivos es necesario emplear luz polarizada, por ejemplo, con la ayuda de un sencillo polarizador lineal. Dependiendo de si el polarizador está colocado delante del dispositivo o detrás del él, se mostrarán las imágenes generadas en una u otra cara. Este efecto es posible gracias al colorante dicroico añadido al CL, a la orientación inducida sobre las moléculas, y a la estructura de twist utilizada en los dispositivos. En realidad, para ver el efecto de los dispositivos no es necesario el uso de un polarizador, basta con el reflejo de una superficie dielétrica (percialmente polarizado), o la luz emitida por la pantalla de dispositivos de consumo comunes como un televisor LCD, un monitor de ordenador o un “smartphone”. Por otro lado, utilizando una mezcla entre un CL nemático polimérico y un CL nemático no polimérico es posible fabricar dispositivos LCPC (Liquid Crystal Polymer Composite) con propiedades electroópticas muy interesantes, que funcionan a tensiones de conmutación bajas. El CL polimérico conforma una estructura de red en el interior del sándwich que mantiene confinado al CL nemático en pequeños microdominios. Se han fabricado dispositivos LCPC con conmutación inversa utilizando tanto alineamiento homogéneo como homeotrópico. Debido a que tanto la estructura de CL polimérico como el CL nemático que rellena los microdominios están orientados en una misma dirección de alineamiento preinducida, la luz dispersada por el dispositivo se encuentra polarizada. La dirección de polarización coincide con la dirección de alineamiento. La innovación aportada por esta investigación: un nuevo dispositivo LCPC inverso de respuesta ultrarápida y polarizada basado en la mezcla de dos CL nemáticos y, un dispositivo de seguridad y autenticación, patentado internacionalmente, basado en CL nemáticos dopados con colorante dicroico. Abstract This thesis is centered on the availability to use polymerizable liquid crystals to develop non-display application LC devices. Liquid crystal properties make them useful for the development of security devices in applications of authentication and detection of fakes, and also to achieve polymer dispersed LC devices to be used for different applications that will be studied here. Induced orientation of liquid crystal molecules and birefringence are the two main properties used in these devices. A standard liquid crystal device is a sandwich consisting of two parallel glass substrates carrying a thin transparent ITO (Indium‐Tin‐Oxide) electrode on their inner surfaces with the liquid crystal in the middle. The first part of this thesis will describe the most important parameters describing a liquid crystal cell. This basis is necessary for the understanding of later chapters where models of the liquid crystal devices will be discussed and developed. In the case of security devices the standard structure of an LC device has been modified by eliminating the glass substrates in order to achieve plastic and flexible devices. The second part of the thesis includes a detailed description of the devices achieved and the manufacturing protocols that have been developed ad-hoc. The optical and electrooptical properties and the characterization equipment are described here as well. Employing nematic liquid crystal and dichroic colorants, we have developed devices that show, with the aid of a polarizer, multiple images on each side of the device. By different alignment techniques it is possible to create any kind of symbols, drawings or motifs with a grayscale; the more complex the created device is, the more difficult is to fake it. To identify the motifs it is necessary to use polarized light. Depending on whether the polarizer is located in front of the LC cell or behind it, different motifs from one or the other substrate are shown. The effect arises from the dopant color dye added to the liquid crystal, the induced orientation and the twist structure. In practice, a grazing reflection on a dielectric surface is polarized enough to see the effect. Any LC flat panel display (LCD TV, computer, mobile phone) can obviously be used as backlight as well. On the other hand, by using a mixture of polymerizable and non-polymerizable nematics liquid crystals it is also possible to achieve LCPC (Liquid Crystal Polymer Composite) devices that show really interesting electrooptical characteristics using low switching voltages. Polymerizable LC creates a hollow structure inside the sandwich glass cell that keep nematics liquid crystal confined creating microdomains. Homogeneous and homeotropic alignments have been used to develop inverse switching mode LCPCs. Due to the double LC oriented structure, the outgoing scattered light from these devices is already polarized. The polarization axis coincides with LC molecules director, the alignment direction promoted. The novelties derived from the investigation presented here, new ultrafast inverse LCPC with polarized outgoing scattered light based on oriented nematic LC mixture, and an internationally patented security and authentication device based on nematics (doped with dichroic dye) oriented polymerizable LC.
Resumo:
This paper proposes an automatic framework for the seamless integration of hardware accelerators, starting from an OpenMP-based application and an XML file describing the HW/SW partitioning. It extends a fully software architecture by generating and integrating the cores, along with the proper interfaces, and the code for scheduling and synchronization. Experimental results show that it is possible to validate different solutions only by varying the input code.
Resumo:
Adaptive hardware requires some reconfiguration capabilities. FPGAs with native dynamic partial reconfiguration (DPR) support pose a dilemma for system designers: whether to use native DPR or to build a virtual reconfigurable circuit (VRC) on top of the FPGA which allows selecting alternative functions by a multiplexing scheme. This solution allows much faster reconfiguration, but with higher resource overhead. This paper discusses the advantages of both implementations for a 2D image processing matrix. Results show how higher operating frequency is obtained for the matrix using DPR. However, this is compensated in the VRC during evolution due to the comparatively negligible reconfiguration time. Regarding area, the DPR implementation consumes slightly more resources due to the reconfiguration engine, but adds further more capabilities to the system.
Resumo:
A new method to analyze the influence of possible hysteresis cycles in devices employed for optical computing architectures is reported. A simple full adder structure is taken as the basis for this method. Single units, called optical programmable logic cells, previously reported by the authors, compose this structure. These cells employ, as basic devices, on-off and SEED-like components. Their hysteresis cycles have been modeled by numerical analysis. The influence of the different characteristic cycles is studied with respect to the obtained possible errors at the output. Two different approaches have been adopted. The first one shows the change in the arithmetic result output with respect to the different values and positions of the hysteresis cycle. The second one offers a similar result, but in a polar diagram where the total behavior of the system is better analyzed.
Resumo:
A new method to obtain digital chaos synchronization between two systems is reported. It is based on the use of Optically Programmable Logic Cells as chaos generators. When these cells are feedbacked, periodic and chaotic behaviours are obtained. They depend on the ratio between internal and external delay times. Chaos synchronization is obtained if a common driving signal feeds both systems. A control to impose the same boundary conditions to both systems is added to the emitter. New techniques to analyse digital chaos are presented. The main application of these structures is to obtain secure communications in optical networks.
Resumo:
A model of the mammalian retina and the behavior of the first layers in the visual cortex is reported. The building blocks are optically programmable logic cells. A model of the retina, similar to the one reported by Dowling (1987) is presented. From the model of the visual cortex obtained, some types of symmetries and asymmetries are possible to be detected
Resumo:
Digital chaotic behavior in an optically processing element is reported. It is obtained as the result of processing two fixed trains of bits. The process is performed with an optically programmable logic gate, previously reported as a possible main block for optical computing. Outputs for some specific conditions of the circuit are given. Digital chaos is obtained using a feedback configuration. Period doublings in a Feigenbaum‐like scenario are obtained. A new method to characterize this type of digital chaos is reported.
Resumo:
A first study in order to construct a simple model of the mammalian retina is reported. The basic elements for this model are Optical Programmable Logic Cells, OPLCs, previously employed as a functional element for Optical Computing. The same type of circuit simulates the five types of neurons present in the retina. Different responses are obtained by modifying either internal or external connections. Two types of behaviors are reported: symmetrical and non-symmetrical with respect to light position. Some other higher functions, as the possibility to differentiate between symmetric and non-symmetric light images, are performed by another simulation of the first layers of the visual cortex. The possibility to apply these models to image processing is reported.
Resumo:
Digital chaotic behavior in an optically processing element is reported. It is obtained as the result of processing two fixed train of bits. The process is performed with an Optically Programmable Logic Gate. Possible outputs for some specific conditions of the circuit are given. These outputs have some fractal characteristics, when input variations are considered. Digital chaotic behavior is obtained by using a feedback configuration. A random-like bit generator is presented.
Resumo:
Protecting signals is one of the main tasks in information transmission. A large number of different methods have been employed since many centuries ago. Most of them have been based on the use of certain signal added to the original one. When the composed signal is received, if the added signal is known, the initial information may be obtained. The main problem is the type of masking signal employed. One possibility is the use of chaotic signals, but they have a first strong limitation: the need to synchronize emitter and receiver. Optical communications systems, based on chaotic signals, have been proposed in a large number of papers. Moreover, because most of the communication systems are digital and conventional chaos generators are analogue, a conversion analogue-digital is needed. In this paper we will report a new system where the digital chaos is obtained from an optically programmable logic structure. This structure has been employed by the authors in optical computing and some previous results in chaotic signals have been reported. The main advantage of this new system is that an analogue-digital conversion is not needed. Previous works by the authors employed Self-Electrooptical Effect Devices but in this case more conventional structures, as semiconductor laser amplifiers, have been employed. The way to analyze the characteristics of digital chaotic signals will be reported as well as the method to synchronize the chaos generators located in the emitter and in the receiver.
Resumo:
Evolvable Hardware (EH) is a technique that consists of using reconfigurable hardware devices whose configuration is controlled by an Evolutionary Algorithm (EA). Our system consists of a fully-FPGA implemented scalable EH platform, where the Reconfigurable processing Core (RC) can adaptively increase or decrease in size. Figure 1 shows the architecture of the proposed System-on-Programmable-Chip (SoPC), consisting of a MicroBlaze processor responsible of controlling the whole system operation, a Reconfiguration Engine (RE), and a Reconfigurable processing Core which is able to change its size in both height and width. This system is used to implement image filters, which are generated autonomously thanks to the evolutionary process. The system is complemented with a camera that enables the usage of the platform for real time applications.
Resumo:
A possible approach to the synchronization of chaotic circuits is reported. It is based on an Optically Programmable Logic Cell and as a consequence its output is digital, its application to cryptography in Optical Communications comes directly from its properties. The model here presented is based on a computer simulation.