972 resultados para silicon limitation


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A processing route has been developed for recovering the desired lambda fiber in iron-silicon electrical steel needed for superior magnetic properties in electric motor application. The lambda fiber texture is available in directionally solidified iron-silicon steel with the < 001 > columnar grains but was lost after heavy rolling and recrystallization required for motor laminations. Two steps of light rolling each followed by recrystallization were found to largely restore the desired fiber texture. This strengthening of the < 001 > fiber texture had been predicted on the basis of the strain-induced boundary migration (SIBM) mechanism during recrystallization of lightly rolled steel from existing grains of near the ideal orientation, due to postulated low stored energies. Taylor and finite element models supported the idea of the low stored energy of the lambda fiber grains. The models also showed that the lambda fiber grains, though unstable during rolling, only rotated away from their initial orientations quite slowly.

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This work investigates the influence of the addition of cerium (IV) ions on the anticorrosion properties of organic-inorganic hybrid coatings applied to passivated tin coated steel. In order to evaluate the specific effect of cerium (IV) addition on nanostructural features of the organic and inorganic phases of the hybrid coating, the hydrolytic polycondensation of silicon alkoxide and the radical polymerization of the methyl methacrylate (MMA) function were induced separately. The corrosion resistance of the coatings was evaluated by means of linear polarization, Tafel type curves and electrochemical impedance measurements. The impedance results obtained for the hybrid coatings were discussed based on an electrical equivalent circuit used to fit the experimental data. The electrochemical results clearly showed the improvement of the protective properties of the organic-inorganic hybrid coating mainly when the cerium (IV) was added to the organic phase solution precursor, which seemed to be due to the formation of a more uniform and densely reticulated siloxane-PMMA film. (C) 2010 Elsevier Ltd. All rights reserved.

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In this work, high-aligned single-walled carbon nanotube (SWCNT) forest have been grown using a high-density plasma chemical vapor deposition technique (at room temperature) and patterned into micro-structures by photolithographic techniques, that are commonly used for silicon integrated circuit fabrication. The SWCNTs were obtained using pure methane plasma and iron as precursor material (seed). For the growth carbon SWCNT forest the process pressure was 15 mTorr, the RF power was 250W and the total time of the deposition process was 3 h. The micropatterning processes of the SWCNT forest included conventional photolithography and magnetron sputtering for growing an iron layer (precursor material). In this situation, the iron layer is patterned and high-aligned SWCNTs are grown in the where iron is present, and DLC is formed in the regions where the iron precursor is not present. The results can be proven by Scanning Electronic Microscopy and Raman Spectroscopy. Thus, it is possible to fabricate SWCNT forest-based electronic and optoelectronic devices. (C) 2010 Elsevier B.V. All rights reserved.

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The goal of this work is to study and relate electrical and optical properties of diamond-like carbon (DLC) thin films for applications in electronic devices. DLC films were deposited in a reactive RF magnetron sputtering system on p-type silicon and glass substrates. The target was a 99.9999% pure, 6 in. diameter graphite plate and methane was used as processing gas. Eight DLC films were produced for each substrate, varying deposition time, the reactor pressure between 5 mTorr and 10 mTorr while the RF power was applied at 13.56 MHz and varied between 100, 150, 200 and 250W. After deposition, the films were analyzed by I-V and C-V measurements (Cheng et al. (2004) [1]) in order to determine the electric resistivity, photo-current response and dielectric constant, optical transmittance, used to find the optical gap by the Tauc method; and by photoluminescence analysis to determine the photoemission and confirm the optical band gap. These characteristics are compared and the influence of the deposition parameters is discussed. (C) 2011 Published by Elsevier B.V.

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The harmonic distortion (HD) exhibited by un-strained and biaxially strained fin-shaped field-effect transistors operating in saturation as single-transistor amplifiers has been investigated for devices with different channel lengths L and fin widths W(fin). The study has been performed through device characterization, 3-D device simulations, and modeling. Nonlinearity has been evaluated in terms of second- and third-order HDs (HD2 and HD3, respectively), and a discussion on its physical sources has been carried out. Also, the influence of the open-loop voltage gain AV in HD has been observed.

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In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by high-density plasma chemical vapor deposition Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films. micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree (that is related with the structure and chemical composition) strongly depend on the substrate surface conditions The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2009 Elsevier B.V. All rights reserved.

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Metal oxide semiconductor (MOS) capacitors with titanium oxide (TiO(x)) dielectric layer, deposited with different oxygen partial pressure (30,35 and 40%) and annealed at 550, 750 and 1000 degrees C, were fabricated and characterized. Capacitance-voltage and current-voltage measurements were utilized to obtain, the effective dielectric constant, effective oxide thickness, leakage current density and interface quality. The obtained TiO(x) films present a dielectric constant varying from 40 to 170 and a leakage current density, for a gate voltage of - 1 V, as low as 1 nA/cm(2) for some of the structures, acceptable for MOS fabrication, indicating that this material is a viable high dielectric constant substitute for current ultra thin dielectric layers. (C) 2009 Elsevier B.V. All rights reserved.

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In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by High Density Plasma Chemical Vapor Deposition. Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films: micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree strongly depend on the substrate surface conditions. The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy. In these samples, the final roughness and the sp(3) hybridization quantity depend strongly on the substrate surface condition. Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2008 Elsevier B.V. All rights reserved.

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Amorphous SiC(x)N(y) films have been deposited on (100) Si substrates by RF magnetron sputtering of a SiC target in a variable nitrogen-argon atmosphere. The as-deposited films were submitted to thermal anneling in a furnace under argon atmosphere at 1000 degrees C for 1 hour. Composition and structure of unannealed and annealed samples were investigated by RBS and FTIR. To study the electrical characteristics of SiC(x)N(y) films, Metal-insulator-semiconductor (MIS) structures were fabricated. Elastic modulus and hardness of the films were determined by nanoindentation. The results of these studies showed that nitrogen content and thermal annealing affect the electrical, mechanical and structural properties of SiC(x)N(y) films.

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This work proposes a refined technique for the extraction of the generation lifetime in single- and double-gate partially depleted SOI nMOSFETs. The model presented in this paper, based on the drain current switch-off transients, takes into account the influence of the laterally non-uniform channel doping, caused by the presence of the halo implanted region, and the amount of charge controlled by the drain and source junctions on the floating body effect when the channel length is reduced. The obtained results for single- gate (SG) devices are compared with two-dimensional numerical simulations and experimental data, extracted for devices fabricated in a 0.1 mu m SOI CMOS technology, showing excellent agreement. The improved model to determine the generation lifetime in double-gate (DG) devices beyond the considerations previously presented also consider the influence of the silicon layer thickness on the drain current transient. The extracted data through the improved model for DG devices were compared with measurements and two-dimensional numerical simulations of the SG devices also presenting a good adjustment with the channel length reduction and the same tendency with the silicon layer thickness variation.

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The temperature influence on the gate-induced floating body effect (GIFBE) in fully depleted (FD) silicon-on-insulator (SOI) nMOSFETs is investigated, based on experimental results and two-dimensional numerical simulations. The GIFBE behavior will be evaluated taking into account the impact of carrier recombination and of the effective electric field mobility degradation on the second peak in the transconductance (gm). This floating body effect is also analyzed as a function of temperature. It is shown that the variation of the studied parameters with temperature results in a ""C"" shape of the threshold voltage corresponding with the second peak in the gm curve. (C) 2008 Elsevier Ltd. All rights reserved.

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In this work we present the fabrication and operation of incandescent microlamps for integrated optics applications. This microlamp emits white and infrared light from a chromium resistor embedded in a free-standing silicon oxynitride (SiO(x)N(y)) cantilever that can be coupled to an optical waveguide. In fact, the chromium resistor is sandwiched between layers of SiO(x)N(y) that isolate it from the atmosphere, while electric current heats the resistor to incandescent temperatures. The same SiO(x)N(y) material used in the microlamp fabrication is also used to produce the optical waveguides to allow a monolithic integration of light source and optical circuit. Front-side bulk micromachining of the silicon substrate in potassium hydroxide (KOH) solution is used to fabricate the cantilevers that thermally isolate the resistors from the substrate, thus reducing the heat transfer and the current required to light the lamp.