994 resultados para silicon etching


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We investigate the dispersion properties of nanometer-scaled silicon waveguides with channel and rib cross section around the optical fiber communication wavelength and systematically study their relationship with the key structural parameters of the waveguide. The simulation results show that the introduction of an extra degree of freedom in the rib depth enables the rib waveguide more flexible in engineering the group velocity dispersion (GVD) compared with the channel waveguide. Besides, we get the structural parameters of the waveguides that can realize zero-GVD at 1550 nm.

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High quality silicon nanowires (SiNWs) were grown directly from n-(111) silicon single crystal substrate by using Au film as a metallic catalyst. The diameter and length of the formed nanowires are 30-60 nm and from several micrometers to sereral tens of micrometers, respectively. The effects of Au film thickness, annealing temperature, growth time and N-2 gas flow rate on the formation of the nanowires were experimentally investigated. The results confirmed that the silicon nanowires with controlled diameter, length, shape and orientation can be obtained via reasonably choosing and optimizing various technical conditions. The formation process of the silicon nanowires is analyzed qualitatively based on solid-liquid-solid growth mechanism.

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Silicon nanowires (SiNWs) were grown directly from n-(111) single-crystal silicon (c-Si) substrate based on a solid-liquid-solid mechanism, and Au film was used as a metallic catalyst. The room temperature photoluminescence properties of SiNWs were observed by an Xe lamp with an exciting wavelength of 350 nm. The results show that the SiNWs exhibit a strongly blue luminescent band in the wavelength range 400-480 nm at an emission peak position of 420 nm. The luminescent mechanism of SiNWs indicates that the blue luminescence is attributed to the oxygen-related defects, which are in SiOx amorphous oxide shells around the crystalline core of SiNWs.

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The typical MEMS fabrication of micro evaporators ensures the perfect smooth wall surface that is lack of nucleation sites, significantly decreasing the heat transfer coefficients compared with miniature evaporators fabricated using copper or stainless steel. In the present paper, we performed the boiling heat transfer experiment in silicon triangular microchannel heat sink over a wide parameter range for 102 runs. Acetone was used as the working fluid. The measured boiling heat transfer coefficients versus the local vapor mass qualities are compared with the classical Chen’s correlation and other correlations for macro and miniature capillary tubes. It is found that most of these correlations significantly over-predict the measured heat transfer coefficients. New correlations are given. There are many reasons for such deviations. The major reason is coming from the perfect smooth silicon surface that lowers the heat transfer performances. New theory is recommended for the silicon microchannel heat sink that should be different from metallic capillary tubes.

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Bulk samples of tellurite glass with composition 75TeO(2)-20ZnO-5Na(2)O (TZN) were fabricated by melting and quenching techniques. In order to improve the surface quality of optical fiber preform made with this tellurite glass, the authors developed a multistage etching process. The relationship between successive etching treatments and roughness of the TZN glass surface was probed by using an atomic force microscope. The results demonstrate that this multistage etching method effectively improves this tellurite glass surface smoothness to a level comparable with that of a reference silica glass slide, and the corresponding chemical micromechanisms and fundamentals are discussed and confirmed by atomic force microscopy, potentially contributing to the development of multicomponent soft glass fibers and devices. (C) 2010 American Vacuum Society. [DOI: 10.1116/1.3437017]

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We report the experimental result of all-optical passive 3.55 Gbit/s non-return-to-zero (NRZ) to pseudo-return-to-zero (PRZ) format conversion using a high-quality-factor (Q-factor) silicon-based microring resonator notch filter on chip. The silicon-based microring resonator has 23800 Q-factor and 22 dB extinction ratio (ER), and the PRZ signals has about 108 ps width and 4.98 dB ER.

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A convenient fabrication technology for large-area, highly-ordered nanoelectrode arrays on silicon substrate has been described here, using porous anodic alumina (PAA) as a template. The ultrathin PAA membranes were anodic oxidized utilizing a two-step anodization method, from Al film evaporated on substrate. The purposes for the use of two-step anodization were, first, improving the regularity of the porous structures, and second reducing the thickness of the membranes to 100 similar to 200 nm we desired. Then the nanoelectrode arrays were obtained by electroless depositing Ni-W alloy into the through pores of PAA membranes, making the alloy isolated by the insulating pore walls and contacting with the silicon substrates at the bottoms of pores. The Ni-W alloy was also electroless deposited at the back surface of silicon to form back electrode. Then ohmic contact properties between silicon and Ni-W alloy were investigated after rapid thermal annealing. Scanning electron microscopy (SEM) observations showed the structure characteristics, and the influence factors of fabrication effect were discussed. The current voltage (I-V) curves revealed the contact properties. After annealing in N-2 at 700 degrees C, good linear property was shown with contact resistance of 33 Omega, which confirmed ohmic contacts between silicon and electrodes. These results presented significant application potential of this technology in nanosize current-injection devices in optoelectronics, microelectronics and bio-medical fields.

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The electronic structure of a bounded intrinsic stacking fault in silicon is calculated. The method used is an LCAO-scheme (Linear Combinations of Atomic Orbitals) taking ten atomic orbitals of s-, p-, and d-type into account. The levels in the band gap are extracted using Lanczos' algorithm and a continued fraction representation of the local density of states. We find occupied states located up to 0.3 eV above the valence band maximum (E(v)). This significantly differs from the result obtained for the ideal infinite fault for which the interface state is located at E(v)+ 0.1 eV.

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A theoretical surface-state model of porous-silicon luminescence is proposed. The temperature effect on the PhotoLuminescence (PL) spectrum for pillar and spherical structures is considered, and it is found that the effect is dependent on the doping concentration, the excitation strength, and the shape and dimensions of the Si microstructure. The doping concentration has an effect on the PL intensity at high temperatures and the excitation strength has an effect on the PL intensity at low temperaturs. The variations of the PL intensity with temperature are different for the pillar and spherical structures. At low temperatures the PL intensity increases in the pillar structure, while in the spherical structure the PL intensity decreases as the temperature increases, at high temperatures the PL intensities have a maximum for both models. The temperature, at which the PL intensity reaches its maximum, depends on the doping concentration. The PL spectrum has a broader peak structure in the spherical structure than in the pillar structure. The theoretical results are in agreement with experimental results.

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The size and distribution of surface features of porous silicon layers have been investigated by scanning tunneling and atomic force microscopy. Pores and hillocks down to 1-2 nm size were observed, with their shape and distribution on the sample surface being influenced by crystallographic effects. The local density of electronic states show a strong increase above 2 eV, in agreement with recent theoretical predictions.