Waveguide-to-microstrip transition at G-band using elevated E-plane probe

A rectangular waveguide-to-microstrip transition operating at G-band is presented. The E-plane probe, used in the transition, is fabricated on semi-insulating gallium arsenide (SI-GaAs) and it is elevated on the substrate. This configuration reduces interaction with semiconductor material. The elevated probe is suitable for direct integration with monolithic microwave integrated circuits. Measured results show S11 better than 210dB between 150 and 200 GHz and S21 ¼ 2 4dB at centre band (180GHz) for two transitions in back-to-back configuration.

Design of latch-based C-element

The C-element logic gate is a key component for constructing asynchronous control in silicon integrated circuits. The purpose of this reported work is to introduce a new speed-independent C-element design, which is synthesised by the asynchronous Petrify design tool to ensure it is composed of sequential digital latches rather than complex gates. The benefits are that it guarantees correct speed-independent operation, together with easy integration in modern design flows and processes. It is compared to an equivalent speed-independent complex gate C-element design generated by Petrify in a 130 nm semiconductor process.

A Compact V-band power detector

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A compact V-band active power detector using Infineon 0.35 µm SiGe HBT process (fT/fmax =170/250 GHz) is described. The total chip area is only 0.35×0.8 mm2 including all pads. This design exhibits a dynamic range larger than 20 dB over the frequency range from 55 GHz to 67 GHz. It also offers a simple and low-power application potential as an envelop detector in multi-Gbps high data rate demodulators for OOK/ASK etc.

Holistic design of 8-way combining transformers in SiGe technology for use in millimetre-wave power amplifiers

This paper presents the design of a novel 8-way power-combining transformer for use in mm-wave power amplifier (PA). The combiner exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. A complete circuit comprised of a power splitter, two-stage cascode PA array, a power combiner and input/output matching elements was designed and realized in SiGe technology. Measured gain of at least 16.8 dB was obtained from 76.4 GHz to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm OP and 14 dBm saturated output power when operated from a 3.2 V DC supply voltage at 78 GHz. © 2013 IEEE.

Data Mapping for Unreliable Memories

Future digital signal processing (DSP) systems must provide robustness on algorithm and application level to the presence of reliability issues that come along with corresponding implementations in modern semiconductor process technologies. In this paper, we address this issue by investigating the impact of unreliable memories on general DSP systems. In particular, we propose a novel framework to characterize the effects of unreliable memories, which enables us to devise novel methods to mitigate the associated performance loss. We propose to deploy specifically designed data representations, which have the capability of substantially improving the system reliability compared to that realized by conventional data representations used in digital integrated circuits, such as 2's-complement or sign-magnitude number formats. To demonstrate the efficacy of the proposed framework, we analyze the impact of unreliable memories on coded communication systems, and we show that the deployment of optimized data representations substantially improves the error-rate performance of such systems.

Parker Morris and the economies of the Fordist house

The Parker Morris report of 1961 attempted, through the application of scientific principles, to define the minimum living space standards needed to accommodate household activities. But while early modernist research into ideas of existenzminimum were the work of avant-garde architects and thinkers, this report was commissioned by the British State. This normalization of scientific enquiry into space can be considered not only a response to new conditions in the mass production of housing – economies of scale, prefabrication, system-building and modular coordination – but also to the post-war boom in consumer goods. The domestic interior was assigned a key role as a privileged site of mass consumption as the production and micro-management of space in Britain became integral to the development of a planned national economy underpinned by Fordist principles. The apparently placeless and scale-less diagrams executed by Gordon Cullen to illustrate Parker Morris emblematize these relationships. Walls dissolve as space flows from inside to outside in a homogenized and ephemeral landscape whose limits are perhaps only the boundaries of the nation state and the circuits of capital.

Dipolar emission in trench metal-insulator-metal waveguides for short-scale plasmonic communications: numerical optimization

Here we consider the numerical optimization of active surface plasmon polariton (SPP) trench waveguides suited for integration with luminescent polymers for use as highly localized SPP source devices in short-scale communication integrated circuits. The numerical analysis of the SPP modes within trench waveguide systems provides detailed information on the mode field components, effective indices, propagation lengths and mode areas. Such trench waveguide systems offer extremely high confinement with propagation on length scales appropriate to local interconnects, along with high efficiency coupling of dipolar emitters to waveguided plasmonic modes which can be close to 80%. The large Purcell factor exhibited in these structures will further lead to faster modulation capabilities along with an increased quantum yield beneficial for the proposed plasmon-emitting diode, a plasmonic analog of the light-emitting diode. The confinement of studied guided modes is on the order of 50 nm and the delay over the shorter 5 μm length scales will be on the order of 0.1 ps for the slowest propagating modes of the system, and significantly less for the faster modes.

An international comparison of legal frameworks for supported and substitute decision-making in mental health services

There have been important recent developments in law, research, policy and practice relating to supporting people with decision-making impairments, in particular when a person’s wishes and preferences are unclear or inaccessible. A driver in this respect is the United Nations Convention on the Rights of Persons with Disabilities (CRPD); the implications of the CRPD for policy and professional practices are currently debated. This article reviews and compares four legal frameworks for supported and substitute decision-making for people whose decision-making ability is impaired. In particular, it explores how these frameworks may apply to people with mental health problems. The four jurisdictions are: Ontario, Canada; Victoria, Australia; England and Wales, United Kingdom (UK); and Northern Ireland, UK. Comparisons and contrasts are made in the key areas of: the legal framework for supported and substitute decision-making; the criteria for intervention; the assessment process; the safeguards; and issues in practice. Thus Ontario has developed a relatively comprehensive, progressive and influential legal framework over the past thirty years but there remain concerns about the standardisation of decision-making ability assessments and how the laws work together. In Australia, the Victorian Law Reform Commission (2012) has recommended that the six different types of substitute decision-making under the three laws in that jurisdiction, need to be simplified, and integrated into a spectrum that includes supported decision-making. In England and Wales the Mental Capacity Act 2005 has a complex interface with mental health law. In Northern Ireland it is proposed to introduce a new Mental Capacity (Health, Welfare and Finance) Bill that will provide a unified structure for all substitute decision-making. The discussion will consider the key strengths and limitations of the approaches in each jurisdiction and identify possible ways that further progress can be made in law, policy and practice.

Parker Morris and the Fordist House

6.00 pm. If people like watching T.V. while they are eating their evening meal, space for a low table is needed (Ministry of Housing and Local Government, Space in the Home, 1963, p. 4).

This paper re-examines the 1961 Parker Morris report on housing standards in Britain. It explores the origins, scope, text and iconography of the report and suggests that these not only express a particularly modernist conception of space but one which presupposed very specific economic conditions and geographies.

Also known as Homes for Today and Tomorrow Parker Morris attempted, through the application of scientific principles, to define the minimum living space standards needed to accommodate household activities. But while early modernist research into notions of existenzminimum were the work of avant-garde architects and thinkers, Homes for Today and Tomorrow and its sister design manual Space in the Home were commissioned by the British State. This normalization of scientific enquiry into space can be considered not only as a response to new conditions in the mass production of housing – economies of scale, prefabrication, system-building and modular coordination – but also to the post-war boom in consumer goods. In this, it is suggested that the domestic interior was assigned a key role as a privileged site of mass consumption as the production and micro-management of space in Britain became integral to the development of a planned national economy underpinned by Fordist principles. Parker Morris, therefore, sought to accommodate activities which were pre-determined not so much by traditional social or familial ties but rather by recently introduced commodities such as the television set, white goods, table tennis tables and train sets. This relationship between the domestic interior and the national economy are emblematized by the series of placeless and scale-less diagrams executed by Gordon Cullen in Space in the Home. Here, walls dissolve as space flows from inside to outside in a homogenized and ephemeral landscape whose limits are perhaps only the boundaries of the nation state and the circuits of capital.

In Britain, Parker Morris was the last explicit State-sponsored attempt to prescribe a normative spatial programme for national living. The calm neutral efficiency of family-life expressed in its diagrams was almost immediately problematised by the rise of 1960s counter-culture, the feminist movement and the oil crisis of 1972 which altered perhaps forever the spatial, temporal and economic conditions it had taken for granted. The debate on space-standards, however, continues.

Synthesis of FPGA-based accelerators implementing recursive algorithms

O desenvolvimento de sistemas computacionais é um processo complexo, com múltiplas etapas, que requer uma análise profunda do problema, levando em consideração as limitações e os requisitos aplicáveis. Tal tarefa envolve a exploração de técnicas alternativas e de algoritmos computacionais para optimizar o sistema e satisfazer os requisitos estabelecidos. Neste contexto, uma das mais importantes etapas é a análise e implementação de algoritmos computacionais. Enormes avanços tecnológicos no âmbito das FPGAs (Field-Programmable Gate Arrays) tornaram possível o desenvolvimento de sistemas de engenharia extremamente complexos. Contudo, o número de transístores disponíveis por chip está a crescer mais rapidamente do que a capacidade que temos para desenvolver sistemas que tirem proveito desse crescimento. Esta limitação já bem conhecida, antes de se revelar com FPGAs, já se verificava com ASICs (Application-Specific Integrated Circuits) e tem vindo a aumentar continuamente. O desenvolvimento de sistemas com base em FPGAs de alta capacidade envolve uma grande variedade de ferramentas, incluindo métodos para a implementação eficiente de algoritmos computacionais. Esta tese pretende proporcionar uma contribuição nesta área, tirando partido da reutilização, do aumento do nível de abstracção e de especificações algorítmicas mais automatizadas e claras. Mais especificamente, é apresentado um estudo que foi levado a cabo no sentido de obter critérios relativos à implementação em hardware de algoritmos recursivos versus iterativos. Depois de serem apresentadas algumas das estratégias para implementar recursividade em hardware mais significativas, descreve-se, em pormenor, um conjunto de algoritmos para resolver problemas de pesquisa combinatória (considerados enquanto exemplos de aplicação). Versões recursivas e iterativas destes algoritmos foram implementados e testados em FPGA. Com base nos resultados obtidos, é feita uma cuidada análise comparativa. Novas ferramentas e técnicas de investigação que foram desenvolvidas no âmbito desta tese são também discutidas e demonstradas.

PP1 interactomes as a means of characterizing protein functions

A maioria das funções celulares, incluindo expressão de genes, crescimento e proliferação celulares, metabolismo, morfologia, motilidade, comunicação intercelular e apoptose, é regulada por interações proteína-proteína (IPP). A célula responde a uma variedade de estímulos, como tal a expressão de proteínas é um processo dinâmico e os complexos formados são constituídos transitoriamente mudando de acordo com o seu ciclo funcional, adicionalmente, muitas proteínas são expressas de uma forma dependente do tipo de célula. Em qualquer instante a célula pode conter cerca de centenas de milhares de IPPs binárias, e encontrar os companheiros de interação de uma proteína é um meio de inferir a sua função. Alterações em redes de IPP podem também fornecer informações acerca de mecanismos de doença. O método de identificação binário mais frequentemente usado é o sistema Dois Hibrido de Levedura, adaptado para rastreio em larga escala. Esta metodologia foi aqui usada para identificar os interactomas específicos de isoforma da Proteína Fosfatase 1 (PP1), em cérebro humano. A PP1 é uma proteína fosfatase de Ser/Thr envolvida numa grande variedade de vias e eventos celulares. É uma proteína conservada codificada por três genes, que originam as isoformas α, β, e γ, com a última a originar γ1 e γ2 por splicing alternativo. As diferentes isoformas da PP1 são reguladas pelos companheiros de interação – proteínas que interagem com a PP1 (PIPs). A natureza modular dos complexos da PP1, bem como a sua associação combinacional, gera um largo reportório de complexos reguladores e papéis em circuitos de sinalização celular. Os interactomas da PP1 específicos de isofoma, em cérebro, foram aqui descritos, com um total de 263 interações identificadas e integradas com os dados recolhidos de várias bases de dados de IPPs. Adicionalmente, duas PIPs foram selecionadas para uma caracterização mais aprofundada da interação: Taperina e Sinfilina-1A. A Taperina é uma proteína ainda pouco descrita, descoberta recentemente como sendo uma PIP. A sua interação com as diferentes isoformas da PP1 e localização celulares foram analisadas. Foi descoberto que a Taperina é clivada e que está presente no citoplasma, membrana e núcleo e que aumenta os níveis de PP1, em células HeLa. Na membrana ela co-localiza com a PP1 e a actina e uma forma mutada da Taperina, no motivo de ligação à PP1, está enriquecida no núcleo, juntamente com a actina. Mais, foi descoberto que a Taperina é expressa em testículo e localiza-se na região acrossómica da cabeça do espermatozoide, uma estrutura onde a PP1 e a actina estão também presentes. A Sinfilina-1A, uma isoforma da Sinfilina-1, é uma proteína com tendência para agregar e tóxica, envolvida na doença de Parkinson. Foi mostrado que a Sinfilina-1A liga às isoformas da PP1, por co-transformação em levedura, e que mutação do seu motivo de ligação à PP1 diminuiu significativamente a interação, num ensaio de overlay. Quando sobre-expressa em células Cos-7, a Sinfilina-1A formou corpos de inclusão onde a PP1 estava presente, no entanto a forma mutada da Sinfilina-1A também foi capaz de agregar, indicando que a formação de inclusões não foi dependente de ligação à PP1. Este trabalho dá uma nova perspetiva dos interactomas da PP1, incluindo a identificação de dezenas de companheiros de ligação específicos de isoforma, e enfatiza a importância das PIPs, não apenas na compreensão das funções celulares da PP1 mas também, como alvos de intervenção terapêutica.

Reconfigurable transmitters for software-defined radios

Flexible radio transmitters based on the Software-Defined Radio (SDR) concept are gaining an increased research importance due to the unparalleled proliferation of new wireless standards operating at different frequencies, using dissimilar coding and modulation schemes, and targeted for different ends. In this new wireless communications paradigm, the physical layer of the radio transmitter must be able to support the simultaneous transmission of multi-band, multi-rate, multi-standard signals, which in practice is very hard or very inefficient to implement using conventional approaches. Nevertheless, the last developments in this field include novel all-digital transmitter architectures where the radio datapath is digital from the baseband up to the RF stage. Such concept has inherent high flexibility and poses an important step towards the development of SDR-based transmitters. However, the truth is that implementing such radio for a real world communications scenario is a challenging task, where a few key limitations are still preventing a wider adoption of this concept. This thesis aims exactly to address some of these limitations by proposing and implementing innovative all-digital transmitter architectures with inherent higher flexibility and integration, and where improving important figures of merit, such as coding efficiency, signal-to-noise ratio, usable bandwidth and in-band and out-of-band noise will also be addressed. In the first part of this thesis, the concept of transmitting RF data using an entirely digital approach based on pulsed modulation is introduced. A comparison between several implementation technologies is also presented, allowing to state that FPGAs provide an interesting compromise between performance, power efficiency and flexibility, thus making them an interesting choice as an enabling technology for pulse-based all-digital transmitters. Following this discussion, the fundamental concepts inherent to pulsed modulators, its key advantages, main limitations and typical enhancements suitable for all-digital transmitters are also presented. The recent advances regarding the two most common classes of pulse modulated transmitters, namely the RF and the baseband-level are introduced, along with several examples of state-of-the-art architectures found on the literature. The core of this dissertation containing the main developments achieved during this PhD work is then presented and discussed. The first key contribution to the state-of-the-art presented here consists in the development of a novel ΣΔ-based all-digital transmitter architecture capable of multiband and multi-standard data transmission in a very flexible and integrated way, where the pulsed RF output operating in the microwave frequency range is generated inside a single FPGA device. A fundamental contribution regarding the simultaneous transmission of multiple RF signals is then introduced by presenting and describing novel all-digital transmitter architectures that take advantage of multi-gigabit data serializers available on current high-end FPGAs in order to transmit in a time-interleaved approach multiple independent RF carriers. Further improvements in this design approach allowed to provide a two-stage up-conversion transmitter architecture enabling the fine frequency tuning of concurrent multichannel multi-standard signals. Finally, further improvements regarding two key limitations inherent to current all-digital transmitter approaches are then addressed, namely the poor coding efficiency and the combined high quality factor and tunability requirements of the RF output filter. The followed design approach based on poliphase multipath circuits allowed to create a new FPGA-embedded agile transmitter architecture that significantly improves important figures of merit, such as coding efficiency and SNR, while maintains the high flexibility that is required for supporting multichannel multimode data transmission.

Nonlinear behavioral modeling of mixed signal RF-digital I/O devices

Esta tese investiga a caracterização (e modelação) de dispositivos que realizam o interface entre os domínios digital e analógico, tal como os buffers de saída dos circuitos integrados (CI). Os terminais sem fios da atualidade estão a ser desenvolvidos tendo em vista o conceito de rádio-definido-por-software introduzido por Mitola. Idealmente esta arquitetura tira partido de poderosos processadores e estende a operação dos blocos digitais o mais próximo possível da antena. Neste sentido, não é de estranhar que haja uma crescente preocupação, no seio da comunidade científica, relativamente à caracterização dos blocos que fazem o interface entre os domínios analógico e digital, sendo os conversores digital-analógico e analógico-digital dois bons exemplos destes circuitos. Dentro dos circuitos digitais de alta velocidade, tais como as memórias Flash, um papel semelhante é desempenhado pelos buffers de saída. Estes realizam o interface entre o domínio digital (núcleo lógico) e o domínio analógico (encapsulamento dos CI e parasitas associados às linhas de transmissão), determinando a integridade do sinal transmitido. Por forma a acelerar a análise de integridade do sinal, aquando do projeto de um CI, é fundamental ter modelos que são simultaneamente eficientes (em termos computacionais) e precisos. Tipicamente a extração/validação dos modelos para buffers de saída é feita usando dados obtidos da simulação de um modelo detalhado (ao nível do transístor) ou a partir de resultados experimentais. A última abordagem não envolve problemas de propriedade intelectual; contudo é raramente mencionada na literatura referente à caracterização de buffers de saída. Neste sentido, esta tese de Doutoramento foca-se no desenvolvimento de uma nova configuração de medição para a caracterização e modelação de buffers de saída de alta velocidade, com a natural extensão aos dispositivos amplificadores comutados RF-CMOS. Tendo por base um procedimento experimental bem definido, um modelo estado-da-arte é extraído e validado. A configuração de medição desenvolvida aborda não apenas a integridade dos sinais de saída mas também do barramento de alimentação. Por forma a determinar a sensibilidade das quantias estimadas (tensão e corrente) aos erros presentes nas diversas variáveis associadas ao procedimento experimental, uma análise de incerteza é também apresentada.

Ferroelectric : CNTs structures fabrication for advanced functional nano devices

This work is about the combination of functional ferroelectric oxides with Multiwall Carbon Nanotubes for microelectronic applications, as for example potential 3 Dimensional (3D) Non Volatile Ferroelectric Random Access Memories (NVFeRAM). Miniaturized electronics are ubiquitous now. The drive to downsize electronics has been spurred by needs of more performance into smaller packages at lower costs. But the trend of electronics miniaturization challenges board assembly materials, processes, and reliability. Semiconductor device and integrated circuit technology, coupled with its associated electronic packaging, forms the backbone of high-performance miniaturized electronic systems. However, as size decreases and functionalization increases in the modern electronics further size reduction is getting difficult; below a size limit the signal reliability and device performance deteriorate. Hence miniaturization of siliconbased electronics has limitations. On this background the Road Map for Semiconductor Industry (ITRS) suggests since 2011 alternative technologies, designated as More than Moore; being one of them based on carbon (carbon nanotubes (CNTs) and graphene) [1]. CNTs with their unique performance and three dimensionality at the nano-scale have been regarded as promising elements for miniaturized electronics [2]. CNTs are tubular in geometry and possess a unique set of properties, including ballistic electron transportation and a huge current caring capacity, which make them of great interest for future microelectronics [2]. Indeed CNTs might have a key role in the miniaturization of Non Volatile Ferroelectric Random Access Memories (NVFeRAM). Moving from a traditional two dimensional (2D) design (as is the case of thin films) to a 3D structure (based on a tridimensional arrangement of unidimensional structures) will result in the high reliability and sensing of the signals due to the large contribution from the bottom electrode. One way to achieve this 3D design is by using CNTs. Ferroelectrics (FE) are spontaneously polarized and can have high dielectric constants and interesting pyroelectric, piezoelectric, and electrooptic properties, being a key application of FE electronic memories. However, combining CNTs with FE functional oxides is challenging. It starts with materials compatibility, since crystallization temperature of FE and oxidation temperature of CNTs may overlap. In this case low temperature processing of FE is fundamental. Within this context in this work a systematic study on the fabrication of CNTs - FE structures using low cost low temperature methods was carried out. The FE under study are comprised of lead zirconate titanate (Pb1-xZrxTiO3, PZT), barium titanate (BaTiO3, BT) and bismuth ferrite (BiFeO3, BFO). The various aspects related to the fabrication, such as effect on thermal stability of MWCNTs, FE phase formation in presence of MWCNTs and interfaces between the CNTs/FE are addressed in this work. The ferroelectric response locally measured by Piezoresponse Force Microscopy (PFM) clearly evidenced that even at low processing temperatures FE on CNTs retain its ferroelectric nature. The work started by verifying the thermal decomposition behavior under different conditions of the multiwall CNTs (MWCNTs) used in this work. It was verified that purified MWCNTs are stable up to 420 ºC in air, as no weight loss occurs under non isothermal conditions, but morphology changes were observed for isothermal conditions at 400 ºC by Raman spectroscopy and Transmission Electron Microscopy (TEM). In oxygen-rich atmosphere MWCNTs started to oxidized at 200 ºC. However in argon-rich one and under a high heating rate MWCNTs remain stable up to 1300 ºC with a minimum sublimation. The activation energy for the decomposition of MWCNTs in air was calculated to lie between 80 and 108 kJ/mol. These results are relevant for the fabrication of MWCNTs – FE structures. Indeed we demonstrate that PZT can be deposited by sol gel at low temperatures on MWCNTs. And particularly interesting we prove that MWCNTs decrease the temperature and time for formation of PZT by ~100 ºC commensurate with a decrease in activation energy from 68±15 kJ/mol to 27±2 kJ/mol. As a consequence, monophasic PZT was obtained at 575 ºC for MWCNTs - PZT whereas for pure PZT traces of pyrochlore were still present at 650 ºC, where PZT phase formed due to homogeneous nucleation. The piezoelectric nature of MWCNTs - PZT synthesised at 500 ºC for 1 h was proved by PFM. In the continuation of this work we developed a low cost methodology of coating MWCNTs using a hybrid sol-gel / hydrothermal method. In this case the FE used as a proof of concept was BT. BT is a well-known lead free perovskite used in many microelectronic applications. However, synthesis by solid state reaction is typically performed around 1100 to 1300 ºC what jeopardizes the combination with MWCNTs. We also illustrate the ineffectiveness of conventional hydrothermal synthesis in this process due the formation of carbonates, namely BaCO3. The grown MWCNTs - BT structures are ferroelectric and exhibit an electromechanical response (15 pm/V). These results have broad implications since this strategy can also be extended to other compounds of materials with high crystallization temperatures. In addition the coverage of MWCNTs with FE can be optimized, in this case with non covalent functionalization of the tubes, namely with sodium dodecyl sulfate (SDS). MWCNTs were used as templates to grow, in this case single phase multiferroic BFO nanorods. This work shows that the use of nitric solvent results in severe damages of the MWCNTs layers that results in the early oxidation of the tubes during the annealing treatment. It was also observed that the use of nitric solvent results in the partial filling of MWCNTs with BFO due to the low surface tension (<119 mN/m) of the nitric solution. The opening of the caps and filling of the tubes occurs simultaneously during the refluxing step. Furthermore we verified that MWCNTs have a critical role in the fabrication of monophasic BFO; i.e. the oxidation of CNTs during the annealing process causes an oxygen deficient atmosphere that restrains the formation of Bi2O3 and monophasic BFO can be obtained. The morphology of the obtained BFO nano structures indicates that MWCNTs act as template to grow 1D structure of BFO. Magnetic measurements on these BFO nanostructures revealed a week ferromagnetic hysteresis loop with a coercive field of 956 Oe at 5 K. We also exploited the possible use of vertically-aligned multiwall carbon nanotubes (VA-MWCNTs) as bottom electrodes for microelectronics, for example for memory applications. As a proof of concept BiFeO3 (BFO) films were in-situ deposited on the surface of VA-MWCNTs by RF (Radio Frequency) magnetron sputtering. For in situ deposition temperature of 400 ºC and deposition time up to 2 h, BFO films cover the VA-MWCNTs and no damage occurs either in the film or MWCNTs. In spite of the macroscopic lossy polarization behaviour, the ferroelectric nature, domain structure and switching of these conformal BFO films was verified by PFM. A week ferromagnetic ordering loop was proved for BFO films on VA-MWCNTs having a coercive field of 700 Oe. Our systematic work is a significant step forward in the development of 3D memory cells; it clearly demonstrates that CNTs can be combined with FE oxides and can be used, for example, as the next 3D generation of FERAMs, not excluding however other different applications in microelectronics.