995 resultados para Substrate temperatures
Resumo:
The structural properties of GaAs grown at low temperatures by molecular beam epitaxy (LTMBE GaAs) were studied. The excess arsenic atoms in LTMBE GaAs exist in the form of arsenic interstitial couples (i,e, two ns atoms share the one host site), and cause an increase in the lattice parameter of LTMBE GaAs. Annealing at above 300 degrees C, the arsenic interstitial couples decomposed, and As precipitates formed, resulting in a decrease in the lattice parameter.
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Electrical, structural and reaction characteristics of In-based ohmic contacts to n-GaAs were studied. Attempts were made to form a low-band-gap interfacial phase of InGaAs to reduce the barrier height at the metal/semiconductor junction, thus yielding low-resistance, highly reliable contacts. The contacts were fabricated by e-beam sputtering Ni, NiIn and Ge targets on VPE-grown n(+)-GaAs film (approximate to 1 mu m, 2 x 10(18) cm(-3)) in ultrahigh vacuum as the structure of Ni(200 Angstrom)/NiIn(100 Angstrom)/Ge(40 Angstrom)/n(+)-GaAs/SI-GaAs, followed by rapid thermal annealing at various temperatures (500-900 degrees C). In this structure, a very thin layer of Ge was employed to play the role of heavily doping donors and diffusion limiters between In and the GaAs substrate. Indium was deposited by sputtering NiIn alloy instead of pure In in order to ensure In atoms to be distributed uniformly in the substrate; nickel was chosen to consume the excess indium and form a high-temperature alloy of Ni3In. The lowest specific contact resistivity (rho(c)) of (1.5 +/- 0.5)x 10(-6) cm(2) measured by the Transmission Line Method (TLM) was obtained after annealing at 700 degrees C for 10 s. Auger sputtering depth profile and Transmission Electron Microscopy (TEM) were used to analyze the interfacial microstructure. By correlating the interfacial microstructure to the electronical properties, InxGa1-xAs phases with a large fractional area grown epitaxially on GaAs were found to be essential for reduction of the contact resistance.
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By using the mass-analyzed low energy dual ion beam deposition technique, a high quality epitaxial, insulating cerium dioxide thin film with a thickness of about 2000 Angstrom, has been grown on a silicon (111) substrate. The component species, cerium and oxygen, are homogeneous in depth, and have the correct stoichiometry for CeO2. X-ray double-crystal diffraction shows that the full width at half maximum of the (222) and (111) peaks of the film are less than 23 and 32 s, respectively, confirming that the film is a perfect single crystal. (C) 1995 American Institute of Physics.
Resumo:
We propose a fiber-to-waveguide coupler for side-illuminated p-i-n photodiodes to obtain high responsivity and low polarization dependence that is grown on InP substrate and is suitable for surface hybrid integration in low cost modules. The fiber-to-waveguide coupler is based on a diluted waveguide,which is composed of ten periods of undoped 120nm InP/80nm InGaAsP (1.05μm bandgap) multiple layers. Using the semi-vectorial three dimensional beam propagation method (BPM) with the central difference scheme,the coupling efficiency of fiber-to-waveguide under different conditions is simulated and studied,and the optimized conditions for fiber-to-waveguide coupling are obtained. For TE-like and TM-like modes,the calculated maximum coupling efficiency is higher than 94% and 92% ,respectively. The calculated polarization dependence is less than 0. ldB,showing good polarization independence.
Resumo:
A reproducible terahertz (THz) photocurrent was observed at low temperatures in a Schottky wrap gate single electron transistor with a normal-incident of a CH_3OH gas laser with the frequency 2. 54THz.The change of source-drain current induced by THz photons shows that a satellite peak is generated beside the resonance peak. THz photon energy can be characterized by the difference of gate voltage positions between the resonance peak and satellite peak. This indicates that the satellite peak exactly results from the THz photon-assisted tunneling. Both experimental results and theoretical analysis show that a narrow spacing of double barriers is more effective for the enhancement of THz response.
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The effects of key geometrical parameters on the performance of integrated spiral inductors are investigated with the 3D electromagnetic simulator HFSS. While varying geometrical parameters such as the number of turns (N),the width of the metal traces (W),the spacing between the traces (S),and the inner diameter (ID), changes in the performance of the inductors are analyzed in detail. The reasons for these changes in performance are presented. Simulation results indicate that the performance of an integrated spiral inductor can be improved by optimizing its layout. Some design rules are summarized.
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A high performance AlAs/In0.53 Ga0.47 As/InAs resonant tunneling diode (RTD) on InP substrate is fabricated by inductively coupled plasma etching. This RTD has a peak-to-valley current ratio (PVCR) of 7. 57 and a peak current density Jp = 39.08kA/cm^2 under forward bias at room temperature. Under reverse bias, the corresponding values are 7.93 and 34.56kA/cm^2 . A resistive cutoff frequency of 18.75GHz is obtained with the effect of a parasitic probe pad and wire. The slightly asymmetrical current-voltage characteristics with a nominally symmetrical structure are also discussed.
Resumo:
The relationship between Ge content of Si1-xGex layers and growth conditions was investigated via UHV/CVD system at relative low temperature of 500℃. Si1-xGex layers were in a metastable state in this case. 10-period strained 3.0 nm- Si0.5Ge0.5/3.4 nm- Si multi quantum wells were obtained directly on Si substrate. Raman Measurement, high resolution electron microscopy and photoluminescence were used to characterize the structural and optical properties. It is found that such relative thick Si0.5Ge0.5/Si multi quantum wells are still near planar and free of dislocations, that makes it exploit applications to electrical and optical devices.
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Three kinds of coplanar waveguides (CPWs) are designed and fabricated on different silicon substrates---common low-resistivity silicon substrate (LRS), LRS with a 3μm-thick silicon oxide interlayer, and high-resistivity silicon (HRS) substrate. The results show that the microwave loss of a CPW on LRS is too high to be used, but it can be greatly reduced by adding a thick interlayer of silicon oxide between the CPW transmission lines and the LRS.A CPW directly on HRS shows a loss lower than 2dB/cm in the range of 0-26GHz and the process is simple,so HRS is a more suitable CPW substrate.
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One group of SiC films are grown on silicon-on-insulator (SOI) substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over-layer thickness decreases for the SOI substrates. Strain relaxation in the SiC epilayer is explained by force balance approach and near coincidence lattice model.
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GaN buffer layers (thickness ~60nm) grown on GaAs(001) by low-temperature MOCVD are investigated by X-ray diffraction pole figure measurements using synchrotron radiation in order to understand the heteroepitaxial growth features of GaN on GaAs(001) substrates. In addition to the epitaxially aligned crystallites,their corresponding twins of the first and the second order are found in the X-ray diffraction pole figures. Moreover, { 111 } q scans with χ at 55° reveal the abnormal distribution of Bragg diffractions. The extra intensity maxima in the pole fig ures shows that the process of twinning plays a dominating role during the growth process. It is suggested that the polarity of { 111 } facets emerged on (001) surface will affect the growth-twin nucleation at the initial stages of GaN growth on GaAs(001) substrates. It is proposed that twinning is prone to occurring on { 111 } B, N-terminated facets.
Resumo:
于2010-11-23批量导入
Resumo:
于2010-11-23批量导入