Low-frequency noise and static analysis of the impact of the TiN metal gate thicknesses on n- and p-channel MuGFETs

The impact of the titanium nitride (TIN) gate electrode thickness has been investigated in n and p channel SOI multiple gate field effect transistors (MuGFETs) through low frequency noise charge pumping and static measurements as well as capacitance-voltage curves The results suggest that a thicker TIN metal gate electrode gives rise to a higher EOT a lower mobility and a higher interface trap density The devices have also been studied for different back gate biases where the GIFBE onset occurs at lower front-gate voltage for thinner TIN metal gate thickness and at higher V(GF) In addition it is demonstrated that post deposition nitridation of the MOCVD HfSiO gate dielectric exhibits an unexpected trend with TIN gate electrode thickness where a continuous variation of EOT and an increase on the degradation of the interface quality are observed (C) 2010 Elsevier Ltd All rights reserved

Harmonic Distortion of Unstrained and Strained FinFETs Operating in Saturation

The harmonic distortion (HD) exhibited by un-strained and biaxially strained fin-shaped field-effect transistors operating in saturation as single-transistor amplifiers has been investigated for devices with different channel lengths L and fin widths W(fin). The study has been performed through device characterization, 3-D device simulations, and modeling. Nonlinearity has been evaluated in terms of second- and third-order HDs (HD2 and HD3, respectively), and a discussion on its physical sources has been carried out. Also, the influence of the open-loop voltage gain AV in HD has been observed.

Nanostructured diamond-like carbon films characterization

In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by high-density plasma chemical vapor deposition Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films. micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree (that is related with the structure and chemical composition) strongly depend on the substrate surface conditions The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2009 Elsevier B.V. All rights reserved.

Study of reactive sputtering titanium oxide for metal-oxide-semiconductor capacitors

Metal oxide semiconductor (MOS) capacitors with titanium oxide (TiO(x)) dielectric layer, deposited with different oxygen partial pressure (30,35 and 40%) and annealed at 550, 750 and 1000 degrees C, were fabricated and characterized. Capacitance-voltage and current-voltage measurements were utilized to obtain, the effective dielectric constant, effective oxide thickness, leakage current density and interface quality. The obtained TiO(x) films present a dielectric constant varying from 40 to 170 and a leakage current density, for a gate voltage of - 1 V, as low as 1 nA/cm(2) for some of the structures, acceptable for MOS fabrication, indicating that this material is a viable high dielectric constant substitute for current ultra thin dielectric layers. (C) 2009 Elsevier B.V. All rights reserved.

Influence of substrate surface topography in the deposition of nanostructured diamond-like carbon films by high density plasma chemical vapor deposition

In this work, we have studied the influence of the substrate surface condition on the roughness and the structure of the nanostructured DLC films deposited by High Density Plasma Chemical Vapor Deposition. Four methods were used to modify the silicon wafers surface before starting the deposition processes of the nanostructured DLC films: micro-diamond powder dispersion, micro-graphite powder dispersion, and roughness generation by wet chemical etching and roughness generation by plasma etching. The reference wafer was only submitted to a chemical cleaning. It was possible to see that the final roughness and the sp(3) hybridization degree strongly depend on the substrate surface conditions. The surface roughness was observed by AFM and SEM and the hybridization degree of the DLC films was analyzed by Raman Spectroscopy. In these samples, the final roughness and the sp(3) hybridization quantity depend strongly on the substrate surface condition. Thus, the effects of the substrate surface on the DLC film structure were confirmed. These phenomena can be explained by the fact that the locally higher surface energy and the sharp edges may induce local defects promoting the nanostructured characteristics in the DLC films. (C) 2008 Elsevier B.V. All rights reserved.

Improved generation lifetime model for the electrical characterization of single- and double-gate SOI nMOSFETs

This work proposes a refined technique for the extraction of the generation lifetime in single- and double-gate partially depleted SOI nMOSFETs. The model presented in this paper, based on the drain current switch-off transients, takes into account the influence of the laterally non-uniform channel doping, caused by the presence of the halo implanted region, and the amount of charge controlled by the drain and source junctions on the floating body effect when the channel length is reduced. The obtained results for single- gate (SG) devices are compared with two-dimensional numerical simulations and experimental data, extracted for devices fabricated in a 0.1 mu m SOI CMOS technology, showing excellent agreement. The improved model to determine the generation lifetime in double-gate (DG) devices beyond the considerations previously presented also consider the influence of the silicon layer thickness on the drain current transient. The extracted data through the improved model for DG devices were compared with measurements and two-dimensional numerical simulations of the SG devices also presenting a good adjustment with the channel length reduction and the same tendency with the silicon layer thickness variation.

Temperature influence on the gate-induced floating body effect parameters in fully depleted SOI nMOSFETs

The temperature influence on the gate-induced floating body effect (GIFBE) in fully depleted (FD) silicon-on-insulator (SOI) nMOSFETs is investigated, based on experimental results and two-dimensional numerical simulations. The GIFBE behavior will be evaluated taking into account the impact of carrier recombination and of the effective electric field mobility degradation on the second peak in the transconductance (gm). This floating body effect is also analyzed as a function of temperature. It is shown that the variation of the studied parameters with temperature results in a ""C"" shape of the threshold voltage corresponding with the second peak in the gm curve. (C) 2008 Elsevier Ltd. All rights reserved.

MEMS-based incandescent microlamps for integrated optics applications

In this work we present the fabrication and operation of incandescent microlamps for integrated optics applications. This microlamp emits white and infrared light from a chromium resistor embedded in a free-standing silicon oxynitride (SiO(x)N(y)) cantilever that can be coupled to an optical waveguide. In fact, the chromium resistor is sandwiched between layers of SiO(x)N(y) that isolate it from the atmosphere, while electric current heats the resistor to incandescent temperatures. The same SiO(x)N(y) material used in the microlamp fabrication is also used to produce the optical waveguides to allow a monolithic integration of light source and optical circuit. Front-side bulk micromachining of the silicon substrate in potassium hydroxide (KOH) solution is used to fabricate the cantilevers that thermally isolate the resistors from the substrate, thus reducing the heat transfer and the current required to light the lamp.

a-SiC : H anti-resonant layer ARROW waveguides

Over the last decades, anti-resonant reflecting optical waveguides (ARROW) have been used in different integrated optics applications. In this type of waveguide, light confinement is partially achieved through an anti-resonant reflection. In this work, the simulation, fabrication and characterization of ARROW waveguides using dielectric films deposited by a plasma-enhanced chemical vapor deposition (PECVD) technique, at low temperatures(similar to 300 degrees C), are presented. Silicon oxynitride (SiO(x)N(y)) films were used as core and second cladding layers and amorphous hydrogenated silicon carbide(a-SiC:H) films as first cladding layer. Furthermore, numerical simulations were performed using homemade routines based on two computational methods: the transfer matrix method (TMM) for the determination of the optimum thickness of the Fabry-Perot layers; and the non-uniform finite difference method (NU-FDM) for 2D design and determination of the maximum width that yields single-mode operation. The utilization of a silicon carbide anti-resonant layer resulted in low optical attenuations, which is due to the high refractive index difference between the core and this layer. Finally, for comparison purposes, optical waveguides using titanium oxide (TiO(2)) as the first ARROW layer were also fabricated and characterized.

Nitrogen doping of SiC thin films deposited by RF magnetron sputtering

Silicon carbide thin films (Si(x)C(y)) were deposited in a RF (13.56 MHz) magnetron sputtering system using a sintered SiC target (99.5% purity). In situ doping was achieved by introducing nitrogen into the electric discharge during the growth process of the films. The N(2)/Ar flow ratio was adjusted by varying the N(2) flow rate and maintaining constant the Ar flow rate. The structure, composition and bonds formed in the nitrogen-doped Si (x) C (y) thin films were investigated by X-ray diffraction (XRD), Rutherford backscattering spectroscopy (RBS), Raman spectroscopy and Fourier transform infrared spectrometry (FTIR) techniques. RBS results indicate that the carbon content in the film decreases as the N(2)/Ar flow ratio increases. Raman spectra clearly reveal that the deposited nitrogen-doped SiC films are amorphous and exhibited C-C bonds corresponding to D and G bands. After thermal annealing, the films present structural modifications that were identified by XRD, Raman and FTIR analyses.

Harmonic distortion of 2-MOS structures for MOSFET-C filters implemented with n-type unstrained and strained FINFETS

This work investigates the harmonic distortion (HD) in 2-MOS balanced structures composed of triple gate FinFETs. HD has been evaluated through the determination of the third-order harmonic distortion (HD3), since this represents the major non-linearity source in balanced structures. The 2-MOS structures with devices of different channel lengths (L) and fin widths (W(fin)) have been studied operating in the linear region as tunable resistors. The analysis was performed as a function of the gate voltage, aiming to verify the correlation between operation bias and HD3. The physical origins of the non-linearities have been investigated and are pointed out. Being a resistive circuit, the 2-MOS structure is generally projected for a targeted on-resistance, which has also been evaluated in terms of HD3. The impact of the application of biaxial strain has been studied for FinFETs of different dimensions. It has been noted that HD3 reduces with the increase of the gate bias for all the devices and this reduction is more pronounced both in narrower and in longer devices. Also, the presence of strain slightly diminishes the non-linearity at a similar bias. However, a drawback associated with the use of strain engineering consists in a significant reduction of the on-resistance with respect to unstrained devices. (C) 2011 Elsevier Ltd. All rights reserved.

Development and fabrication of an optimized thermo-electro-optic device using a Mach-Zehnder interferometer

The development and fabrication of a thermo-electro-optic sensor using a Mach-Zehnder interferometer and a resistive micro-heater placed in one of the device`s arms is presented. The Mach-Zehnder structure was fabricated on a single crystal silicon substrate using silicon oxynitride and amorphous hydrogenated silicon carbide films to form an anti-resonant reflective optical waveguide. The materials were deposited by Plasma enhanced chemical vapor deposition technique at low temperatures (similar to 320 degrees C). To optimize the heat transfer and increase the device response with current variation, part of the Mach-Zehnder sensor arm was suspended through front-side bulk micromachining of the silicon substrate in a KOH solution. With the temperature variation caused by the micro-heater, the refractive index of the core layer of the optical waveguide changes due to the thermo-optic effect. Since this variation occurs only in one of the Mach-Zehnder`s arm, a phase difference between the arms is produced, leading to electromagnetic interference. In this way, the current applied to the micro-resistor can control the device output optical power. Further, reactive ion etching technique was used in this work to define the device`s geometry, and a study of SF6 based etching rates on different composition of silicon oxynitride films is also presented. (C) 2007 Elsevier B.V. All rights reserved.

Impact of SEG on uniaxially strained MuGFET performance

This work focuses on the impact of the source and drain Selective Epitaxial Growth (SEG) on the performance of uniaxially strained MuGFETs. With the channel length reduction, the normalized transconductance (gm.L./W) of unstressed MuGFETs decreases due to the series resistance and short channel effects (SCE), while the presence of uniaxial strain improves the gm. The competition between the series resistance (R(s)) and the uniaxial strain results in a normalized gm maximum point for a specific channel length. Since the SEG structure influences both R(s) and the strain in the channel, this work studies from room down to low temperature how these effects influence the performance of the triple-gate FETs. For lower temperatures, the strain-induced mobility enhancement increases and leads to a shift in the maximum point towards shorter channel lengths for devices without SEG. This shift is not observed for devices with SEG where the strain level is much lower. At 150 K the gm behavior of short channel strained devices with SEG is similar to the non SEC ones due to the better gm temperature enhancement for devices without SEG caused by the strain. For lower temperatures SEG structure is not useful anymore. (C) 2011 Elsevier Ltd. All rights reserved.

Cryogenic Operation of Junctionless Nanowire Transistors

This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature.

Effects of mechanical properties, residual stress and indenter tip geometry on instrumented indentation data in thin films

In this work, an axisymmetric two-dimensional finite element model was developed to simulate instrumented indentation testing of thin ceramic films deposited onto hard steel substrates. The level of film residual stress (sigma(r)), the film elastic modulus (E) and the film work hardening exponent (n) were varied to analyze their effects on indentation data. These numerical results were used to analyze experimental data that were obtained with titanium nitride coated specimens, in which the substrate bias applied during deposition was modified to obtain films with different levels of sigma(r). Good qualitative correlation was obtained when numerical and experimental results were compared, as long as all film properties are considered in the analyses, and not only sigma(r). The numerical analyses were also used to further understand the effect of sigma(r) on the mechanical properties calculated based on instrumented indentation data. In this case, the hardness values obtained based on real or calculated contact areas are similar only when sink-in occurs, i.e. with high n or high ratio VIE, where Y is the yield strength of the film. In an additional analysis, four ratios (R/h(max)) between indenter tip radius and maximum penetration depth were simulated to analyze the combined effects of R and sigma(r) on the indentation load-displacement curves. In this case, or did not significantly affect the load curve exponent, which was affected only by the indenter tip radius. On the other hand, the proportional curvature coefficient was significantly affected by sigma(r) and n. (C) 2010 Elsevier B.V. All rights reserved.