Simulation of multigate SOI transistors with silicon, germanium and III-V channels

In this work by employing numerical three-dimensional simulations we study the electrical performance and short channel behavior of several multi-gate transistors based on advanced SOI technology. These include FinFETs, triple-gate and gate-all-around nanowire FETs with different channel material, namely Si, Ge, and III-V compound semiconductors, all most promising candidates for future nanoscale CMOS technologies. Also, a new type of transistor called “junctionless nanowire transistor” is presented and extensive simulations are carried out to study its electrical characteristics and compare with the conventional inversion- and accumulation-mode transistors. We study the influence of device properties such as different channel material and orientation, dimensions, and doping concentration as well as quantum effects on the performance of multi-gate SOI transistors. For the modeled n-channel nanowire devices we found that at very small cross sections the nanowires with silicon channel are more immune to short channel effects. Interestingly, the mobility of the channel material is not as significant in determining the device performance in ultrashort channels as other material properties such as the dielectric constant and the effective mass. Better electrostatic control is achieved in materials with smaller dielectric constant and smaller source-to-drain tunneling currents are observed in channels with higher transport effective mass. This explains our results on Si-based devices. In addition to using the commercial TCAD software (Silvaco and Synopsys TCAD), we have developed a three-dimensional Schrödinger-Poisson solver based on the non-equilibrium Green’s functions formalism and in the framework of effective mass approximation. This allows studying the influence of quantum effects on electrical performance of ultra-scaled devices. We have implemented different mode-space methodologies in our 3D quantum-mechanical simulator and moreover introduced a new method to deal with discontinuities in the device structures which is much faster than the coupled-mode-space approach.

First principles modelling of nucleation and growth during atomic layer deposition onto III-V substrates

Atomic layer deposition (ALD) is now used in semiconductor fabrication lines to deposit nanometre-thin oxide films, and has thus enabled the introduction of high-permittivity dielectrics into the CMOS gate stack. With interest increasing in transistors based on high mobility substrates, such as GaAs, we are investigating the surface treatments that may improve the interface characteristics. We focus on incubation periods of ALD processes on III-V substrates. We have applied first principles Density Functional Theory (DFT) to investigate detailed chemistry of these early stages of growth, specifically substrate and ALD precursor interaction. We have modelled the ‘clean-up’ effect by which organometallic precursors: trimethylaluminium (TMA) or hafnium and titanium amides clean arsenic oxides off the GaAs surface before ALD growth of dielectric commences and similar effect on Si3N4 substrate. Our simulations show that ‘clean-up’ of an oxide film strongly depends on precursor ligand, its affinity to the oxide and the redox character of the oxide. The predominant pathway for a metalloid oxide such as arsenic oxide is reduction, producing volatile molecules or gettering oxygen from less reducible oxides. An alternative pathway is non-redox ligand exchange, which allows non-reducible oxides (e.g. SiO2) to be cleaned-up. First principles study shows also that alkylamides are more susceptible to decomposition rather than migration on the oxide surface. This improved understanding of the chemical principles underlying ‘clean-up’ allows us to rationalize and predict which precursors will perform the reaction. The comparison is made between selection of metal chlorides, methyls and alkylamides precursors.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Facet-embedded thin-film III-V edge-emitting lasers integrated with SU-8 waveguides on silicon.

A thin-film InGaAs/GaAs edge-emitting single-quantum-well laser has been integrated with a tapered multimode SU-8 waveguide onto an Si substrate. The SU-8 waveguide is passively aligned to the laser using mask-based photolithography, mimicking electrical interconnection in Si complementary metal-oxide semiconductor, and overlaps one facet of the thin-film laser for coupling power from the laser to the waveguide. Injected threshold current densities of 260A/cm(2) are measured with the reduced reflectivity of the embedded laser facet while improving single mode coupling efficiency, which is theoretically simulated to be 77%.

Arsenic(III,V) adsorption onto charred dolomite: charring optimization and batch studies

In this work, the removal of arsenic from aqueous solutions onto thermally processed dolomite is investigated. The dolomite was thermally processed (charred) at temperatures of 600, 700 and 800 degrees C for 1, 2, 4 and 8 h. Isotherm experiments were carried out on these samples over a wide pH range. A complete arsenic removal was achieved over the pH range studied when using the 800 degrees C charred dolomite. However, at this temperature, thermal degradation of the dolomite weakens its structure due to the decomposition of the magnesium carbonate, leading to a partial dissolution. For this reason, the dolomitic sorbent chosen for further investigations was the 8 h at 700 degrees C material. Isotherm studies indicated that the Langmuir model was successful in describing the process to a better extent than the Freundlich model for the As(V) adsorption on the selected charred dolomite. However, for the As(III) adsorption, the Freundlich model was more successful in describing the process. The maximum adsorption capacities of charred dolomite for arsenite and arsenate ions are 1.846 and 2.157 mg/g, respectively. It was found that both the pseudo first- and second-order kinetic models are able to describe the experimental data (R-2 > 0.980). The data suggest the charring process allows dissociation of the dolomite to calcium carbonate and magnesium oxide, which accelerates the process of arsenic oxide and arsenic carbonate precipitation. (C) 2014 Elsevier B.V. All rights reserved.

Molecular Beam Epitaxial Growth of III-V Semiconductor Nanostructures on Silicon Substrates

The main focus and concerns of this PhD thesis is the growth of III-V semiconductor nanostructures (Quantum dots (QDs) and quantum dashes) on silicon substrates using molecular beam epitaxy (MBE) technique. The investigation of influence of the major growth parameters on their basic properties (density, geometry, composition, size etc.) and the systematic characterization of their structural and optical properties are the core of the research work. The monolithic integration of III-V optoelectronic devices with silicon electronic circuits could bring enormous prospect for the existing semiconductor technology. Our challenging approach is to combine the superior passive optical properties of silicon with the superior optical emission properties of III-V material by reducing the amount of III-V materials to the very limit of the active region. Different heteroepitaxial integration approaches have been investigated to overcome the materials issues between III-V and Si. However, this include the self-assembled growth of InAs and InGaAs QDs in silicon and GaAx matrices directly on flat silicon substrate, sitecontrolled growth of (GaAs/In0,15Ga0,85As/GaAs) QDs on pre-patterned Si substrate and the direct growth of GaP on Si using migration enhanced epitaxy (MEE) and MBE growth modes. An efficient ex-situ-buffered HF (BHF) and in-situ surface cleaning sequence based on atomic hydrogen (AH) cleaning at 500 °C combined with thermal oxide desorption within a temperature range of 700-900 °C has been established. The removal of oxide desorption was confirmed by semicircular streaky reflection high energy electron diffraction (RHEED) patterns indicating a 2D smooth surface construction prior to the MBE growth. The evolution of size, density and shape of the QDs are ex-situ characterized by atomic-force microscopy (AFM) and transmission electron microscopy (TEM). The InAs QDs density is strongly increased from 108 to 1011 cm-2 at V/III ratios in the range of 15-35 (beam equivalent pressure values). InAs QD formations are not observed at temperatures of 500 °C and above. Growth experiments on (111) substrates show orientation dependent QD formation behaviour. A significant shape and size transition with elongated InAs quantum dots and dashes has been observed on (111) orientation and at higher Indium-growth rate of 0.3 ML/s. The 2D strain mapping derived from high-resolution TEM of InAs QDs embedded in silicon matrix confirmed semi-coherent and fully relaxed QDs embedded in defectfree silicon matrix. The strain relaxation is released by dislocation loops exclusively localized along the InAs/Si interfaces and partial dislocations with stacking faults inside the InAs clusters. The site controlled growth of GaAs/In0,15Ga0,85As/GaAs nanostructures has been demonstrated for the first time with 1 μm spacing and very low nominal deposition thicknesses, directly on pre-patterned Si without the use of SiO2 mask. Thin planar GaP layer was successfully grown through migration enhanced epitaxy (MEE) to initiate a planar GaP wetting layer at the polar/non-polar interface, which work as a virtual GaP substrate, for the GaP-MBE subsequently growth on the GaP-MEE layer with total thickness of 50 nm. The best root mean square (RMS) roughness value was as good as 1.3 nm. However, these results are highly encouraging for the realization of III-V optical devices on silicon for potential applications.

Study of the vertical transport in p-doped superlattices based on group III-V semiconductors

The electrical conductivity σ has been calculated for p-doped GaAs/Al0.3Ga0.7As and cubic GaN/Al0.3Ga0.7N thin superlattices (SLs). The calculations are done within a self-consistent approach to the k → ⋅ p → theory by means of a full six-band Luttinger-Kohn Hamiltonian, together with the Poisson equation in a plane wave representation, including exchange correlation effects within the local density approximation. It was also assumed that transport in the SL occurs through extended minibands states for each carrier, and the conductivity is calculated at zero temperature and in low-field ohmic limits by the quasi-chemical Boltzmann kinetic equation. It was shown that the particular minibands structure of the p-doped SLs leads to a plateau-like behavior in the conductivity as a function of the donor concentration and/or the Fermi level energy. In addition, it is shown that the Coulomb and exchange-correlation effects play an important role in these systems, since they determine the bending potential.

Si(100) versus Ge(100): Watching the interface formation for the growth of III-V-based solar cells on abundant substrates

We investigated the atomic surface properties of differently prepared silicon and germanium (100) surfaces during metal-organic vapour phase epitaxy/chemical vapour deposition (MOVPE/MOCVD), in particular the impact of the MOVPE ambient, and applied reflectance anisotropy/difference spectroscopy (RAS/RDS) in our MOVPE reactor to in-situ watch and control the preparation on the atomic length scale for subsequent III-V-nucleation. The technological interest in the predominant opto-electronic properties of III-V-compounds drives the research for their heteroepitaxial integration on more abundant and cheaper standard substrates such as Si(100) or Ge(100). In these cases, a general task must be accomplished successfully, i.e. the growth of polar materials on non-polar substrates and, beyond that, very specific variations such as the individual interface formation and the atomic step structure, have to be controlled. Above all, the method of choice to grow industrial relevant high-performance device structures is MOVPE, not normally compatible with surface and interface sensitive characterization tools, which are commonly based on ultrahigh vacuum (UHV) ambients. A dedicated sample transfer system from MOVPE environment to UHV enabled us to benchmark the optical in-situ spectra with results from various surfaces science instruments without considering disruptive contaminants. X-ray photoelectron spectroscopy (XPS) provided direct observation of different terminations such as arsenic and phosphorous and verified oxide removal under various specific process parameters. Absorption lines in Fourier-transform infrared (FTIR) spectra were used to identify specific stretch modes of coupled hydrides and the polarization dependence of the anti-symmetric stretch modes distinguished different dimer orientations. Scanning tunnelling microscopy (STM) studied the atomic arrangement of dimers and steps and tip-induced H-desorption proved the saturation of dangling bonds after preparati- n. In-situ RAS was employed to display details transiently such as the presence of H on the surface at lower temperatures (T <; 800°C) and the absence of Si-H bonds at elevated annealing temperature and also surface terminations. Ge buffer growth by the use of GeH4 enables the preparation of smooth surfaces and leads to a more pronounced amplitude of the features in the spectra which indicates improvements of the surface quality.

Optimizing Bottom Subcells for III-V-on-Si MultiJunction Solar Cells

Dual-junction solar cells formed by a GaAsP or GaInP top cell and a silicon bottom cell seem to be attractive candidates to materialize the long sought-for integration of III-V materials on silicon for photovoltaic applications. Such integration would offer a cost breakthrough for photovoltaic technology, unifying the low cost of silicon and the efficiency potential of III-V multijunction solar cells. In this study, we analyze several factors influencing the performance of the bottom subcell of this dual-junction, namely, 1) the formation of the emitter as a result of the phosphorus diffusion that takes place during the prenucleation temperature ramp and during the growth of the III-V layers; 2) the degradation in surface morphology during diffusion; and 3) the quality needed for the passivation provided by the GaP layer on the emitter.

Integration of III-V materials on Silicon Substrates for Multi-junction Solar Cell Applications

The work presented here aims to reduce the cost of multijunction solar cell technology by developing ways to manufacture them on cheap substrates such as silicon. In particular, our main objective is the growth of III-V semiconductors on silicon substrates for photovoltaic applications. The goal is to create a GaAsP/Si virtual substrates onto which other III-V cells could be integrated with an interesting efficiency potential. This technology involves several challenges due to the difficulty of growing III-V materials on silicon. In this paper, our first work done aimed at developing such structure is presented. It was focused on the development of phosphorus diffusion models on silicon and on the preparation of an optimal silicon surface to grow on it III-V materials.

XPS as Characterization Tool for PV: From the Substrate to Complete III-V Multijunction Solar Cells

This contribution aims to illustrate the potential of the X-ray photoelectron spectroscopy (XPS) technique as a tool to analyze different parts of a solar cell (surface state, heterointerfaces, profile composition of ohmic contacts, etc). Here, the analysis is specifically applied to III-V multijunction solar cells used in concentrator systems. The information provided from such XPS analysis has helped to understand the physico-chemical nature of these surfaces and interfaces, and thus has guided the technological process in order to improve the solar cell performance.

Statistical Calculation of the Main Reliability Functions of GaAs Concentrator III-V Solar Cells

This paper presents some of the results of a method to determine the main reliability functions of concentrator solar cells. High concentrator GaAs single junction solar cells have been tested in an Accelerated Life Test. The method can be directly applied to multi-junction solar cells. The main conclusions of this test carried out show that these solar cells are robust devices with a very low probability of failure caused by degradation during their operation life (more than 30 years). The evaluation of the probability operation function (i.e. the reliability function R(t)) is obtained for two nominal operation conditions of these cells, namely simulated concentration ratios of 700 and 1050 suns. Preliminary determination of the Mean Time to Failure indicates a value much higher than the intended operation life time of the concentrator cells.

Impact of MOVPE Environment on Silicon Substrates for III-V-on-Si Multijunction Solar Cells

With the final goal of integrating III-V materials to silicon for tandem solar cells, the influence of the metal-organic vapor phase epitaxy (MOVPE) environment on the minority carrier properties of silicon wafers has been evaluated. These properties will essentially determine the photovoltaic performance of the bottom cell in a III-V-on-Si tandem solar cell device. A comparison of the base minority carrier lifetimes obtained for different thermal processes carried out in a MOVPE reactor on Czochralski silicon wafers has been carried out. The effect of the formation of the emitter by phosphorus diffusion has also been evaluated.

Understanding phosphorus diffusion into silicon in a MOVPE environment for III-V on silicon solar cells

Dual-junction solar cells formed by a GaAsP or GaInP top cell and a silicon bottom cell seem to be attractive candidates to materialize the long sought-for integration of III?V materials on silicon for photovoltaic applications. When manufacturing a multi-junction solar cell on silicon, one of the first processes to be addressed is the development of the bottom subcell and, in particular, the formation of its emitter. In this study, we analyze, both experimentally and by simulations, the formation of the emitter as a result of phosphorus diffusion that takes place during the first stages of the epitaxial growth of the solar cell. Different conditions for the Metal-Organic Vapor Phase Epitaxy (MOVPE) process have been evaluated to understand the impact of each parameter, namely, temperature, phosphine partial pressure, time exposure and memory effects in the final diffusion profiles obtained. A model based on SSupremIV process simulator has been developed and validated against experimental profiles measured by ECV and SIMS to calculate P diffusion profiles in silicon formed in a MOVPE environment taking in consideration all these factors.