Normal incidence p-i-n Ge heterojunction photodiodes on Si substrate grown by ultrahigh vacuum chemical vapor deposition

We report on normal incidence p-i-n heterojunction photodiodes operating in the near-infrared region and realized in pure germanium on planar silicon substrate. The diodes were fabricated by ultrahigh vacuum chemical vapor deposition at 600 degrees C without thermal annealing and allowing the integration with standard silicon processes. Due to the 0.14% residual tensile strain generated by the thermal expansion mismatch between Ge and Si, an efficiency enhancement of nearly 3-fold at 1.55 mu m and the absorption edge shifting to longer wavelength of about 40 nm are achieved in the epitaxial Ge films. The diode with a responsivity of 0.23 A/W at 1.55 mu m wavelength and a bulk dark current density of 10 mA/cm(2) is demonstrated. These diodes with high performances and full compatibility with the CMOS processes enable monolithically integrating microphotonics and microelectronics on the same chip.

Single-photon-emitting diode at liquid nitrogen temperature

We report on the study of a single-photon-emitting diode at 77 K. The device is composed of InAs/GaAs quantum dots embedded in the i-region of a p-i-n diode structure. The high signal to noise ratio of the electroluminescence, as well as the small second order correlation function at zero-delay g((2))(0), implies that the device has a low multiphoton emission probability. By comparing the device performances under different excitation conditions, we have, in detail, discussed the basic parameters, such as signal to noise ratio and g((2))(0), and provided some useful information for the future application. (c) 2008 American Institute of Physics.

Smart universal multiple-valued logic gates by transferring single electrons

This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

Design of novel three port optical gates scheme for the integration of large optical cavity electroabsorption modulators and evanescently-coupled photodiodes

This paper presents a novel scheme to monolithically integrate an evanescently-coupled uni-travelling carrier photodiode with a planar short multimode waveguide structure and a large optical cavity electroabsorption modulator based on a multimode waveguide structure. By simulation, both electroabsorption modulator and photodiode show excellent optical performances. The device can be fabricated with conventional photolithography, reactive ion etching, and chemical wet etching.

Simulation of In0.65Ga0.35N single-junction solar cell

The performances of In0.65Ga0.35N single-junction solar cells with different structures, including various doping densities and thicknesses of each layer, have been simulated. It is found that the optimum efficiency of a In0.65Ga0.35N solar cell is 20.284% with 5 x 10(17) cm(-3) carrier concentration of the front and basic regions, a 130 nm thick p-layer and a 270 nm thick n-layer.

High-power operation of uncoated strain-compensated quantum cascade lasers at 4.8 mu m

High-power operation of uncoated 22-mu m-wide quantum cascade lasers (QCLs) emitting at lambda approximate to 4.8 mu m is reported. The emitting region of the QCL structure consists of a 30-period strain-compensated In0.68Ga0.32As/In0.37Al0.63As superlattice. For a 4-mm-long laser in pulsed mode, a peak output power is achieved in excess of 2240mW per facet at 81K with a threshold current density of 0.64kA/cm(2). The effects of varying the cavity lengths from 1 to 4mm on the performances of the QCLs are analysed in detail and the low waveguide loss of only about 1.4 cm(-1) is extracted.

Long-wavelength SiGe/Si MQW resonant-cavity-enhanced photodiodes (RCE-PD)

Si1-xGex/Si optoelectronic devices are promising for the monolithic integration with silicon-based microelectronics. SiGe/Si MQW RCE-PD (Resonant-Cavity-Enhanced photodiodes) with different structures were investigated in this work. Design and fabrication of top- and bottom-incident RCE-PD, such as growth of SiGe MQW (Multiple Quantum Wells) on Si and SOI (Si on insulator) wafers, bonding between SiGe epitaxial wafer and SOR (Surface Optical Reflector) consisting Of SiO2/Si DBR (Distributed Bragg Reflector) films on Si, and performances of RCE-PD, were presented. The responsivity of 44mA/W at 1.314 mum and the FWHM of 6nm were obtained at bias of 10V. The highest external quantum efficiency measured in the investigation is 4.2%.

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

Improved DC and RF performance of AlGaN/GaN HEMTs grown by MOCVD on sapphire substrates

High-quality AlGaN/GaN high electron mobility transistor (HEMT) structures were grown by metalorganic chemical vapor deposition (MOCVD) on 2-in. sapphire substrates. Two-dimensional electron gas (2DEG) mobility of 1410 cm(2)/Vs and concentration of 1.0X10(13) CM-2 are obtained at 295 K from the HEMT structures, whose average sheet resistance and sheet resistance uniformity are measured to be about 395 Omega/sq and 96.65% on 2-in. wafers, respectively. AlGaN/GaN HEMTs with 0.8 mu m gate length and 0.2 mm gate width were fabricated and characterized using the grown HEMT structures. Maximum current density of 0.9 A/ mm, peak extrinsic transconductance of 290 mS/mm, unity cutoff frequency (f(T)) of 20 GHz and maximum oscillation frequency (f(max) of 46 GHz are achieved. These results represent significant improvements over the previously fabricated devices with the same gate length, which are attributed to the improved performances of the MOCVD-grown HEMT structures. (c) 2005 Elsevier Ltd. All rights reserved.

Research progresses of SOI optical waveguide devices and integrated optical switch matrix

SOI (silicon-on-insulator) is a new material with a lot of important performances such as large index difference, low transmission loss. Fabrication processes for SOI based optoelectronic devices are compatible with conventional IC processes. Having the potential of OEIC monolithic integration, SOI based optoelectronic devices have shown many good characteristics and become more and more attractive recently. In this paper, the recent progresses of SOI waveguide devices in our research group are presented. By highly effective numerical simulation, the single mode conditions for SOI rib waveguides with rectangular and trapezoidal cross-section were accurately investigated. Using both chemical anisotropic wet etching and plasma dry etching techniques, SOI single mode rib waveguide, MMI coupler, VOA (variable optical attenuator), 2X2 thermal-optical switch were successfully designed and fabricated. Based on these, 4X4 and 8X8 SOI optical waveguide integrated switch matrixes are demonstrated for the first time.

QE and Suns-V-oc study on the epitaxial CSiTF solar cells

In order to clarify the major factors having confined the efficiencies of as-prepared crystalline silicon thin film (CSiTF) solar cells on the SSP (silicon sheets from powder) ribbons, QE (quantum efficiency) and Suns-V-oc study were performed on the epitaxial CSiTF solar cells fabricated on the SSP ribbons, the SSP ribbons after surface being zone melting recrystallized (ZMR) and single crystalline silicon (sc-Si) substrates. The results show that the epi-layers deposited on the SSP ribbons have rough surfaces, which not only increases the diffusion reflectance on the surfaces but also makes the anti-reflection coatings become structure-loosened, both of which would deteriorate the light trapping effect; in addition, the epi-layers deposited on the SSP ribbons possess poor crystallographic quality, so the heavy grain boundary (GB) recombination limits the diffusion length of the minority carriers in the epi-layers, which makes the as-prepared CSiTF solar cells suffer the worse spectra response at long-wavelength range. Nearly all the dark characteristic parameters of the CSiTF solar cells are far away from the ideal values. The performances of the CSiTF solar cells are especially affected by too high I-02 (the dark saturation current of space charge region) values and too low R-sh (parallel resistance) values. The higher 102 values are mainly caused by the heavy GB recombination resulting from the poor crystallographic qualities of the silicon active layers in the space charge regions, while the lower R-sh values are attributed to the electrical leakage at the un-passivated PN junction or solar cell edges after the solar cells are cut by the laser scriber.

Measurement of small-signal and large-signal responses of packaged laser modules at high temperature

In this paper, the pulsed injection method is extended to measure the chip temperature of various packaged laser modules, such as the DFB laser modules, the FP laser modules, and the EML laser modules. An optimal injection condition is obtained by investigating the dependence of the lasing wavelength on the width and period of the injection pulse in a relatively wide temperature range. The small-signal frequency responses and large-signal performances of packaged laser modules at different chip temperature are measured. The adiabatic small-signal modulation characteristics of packaged LD are first extracted. In the large-signal measurement, the effects of chip temperature, bias current and driving signal on the performances of the laser modules are discussed. It has been found that the large-signal performances of the EML modules depend on the different red-shift speeds of the DFB and EAM sections as chip temperature varying, and the optimal characteristics may be achieved at higher temperature.

Novel hybrid voltage controlled ring oscillators using single electron and MOS transistors

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

Structure optimization of field-plate AlGaN/GaN HEMTs

AlGaN/GaN high electron mobility transistors (HEMTs) on 6H-SiC with varying field-plate length and gate-drain spacing were fabricated and analyzed. The classical small signal FET model and the well-known ColdFET method were used to extract the small signal parameters of the devices. Though the devices with field plates exhibited lower better f(T) characteristic, they did demonstrate better f(max), MSG and power density performances than the conventional devices without field plate. Besides, no independence of DC characteristic on field-plate length was observed. With the increase of the field-plate length and the gate-drain spacing, the characteristic of f(T) and f(max), degraded due to the large parasitic effects. Loadpull method was used to measure the microwave power performance of the devices. Under the condition of continuous wave at 5.4 GHz, an output power density of 4.69 W/mm was obtained for device with field-plate length of 0.5 mu m and gate-drain length of 2 mu m. (c) 2006 Elsevier Ltd. All rights reserved.

Influence of AlN interfacial layer on electrical properties of high-Al-content Al0.45Ga0.55N/GaN HEMT structure

Unintentionally doped high-Al-content Al0.45Ga0.55N/GaN high electron mobility transistor (HEMT) structures with and without AlN interfacial layer were grown by metal-organic chemical vapor deposition (MOCVD) on two-inch sapphire substrates. The effects of AlN interfacial layer on the electrical properties were investigated. At 300 K, high two-dimensional electron gas (2DEG) density of 1.66 x 10(11) cm(-2) and high electron mobility of 1346 cm(2) V-1 s(-1) were obtained for the high Al content HEMT structure with a 1 nm AlN interfacial layer, consistent with the low average sheet resistance of 287 Omega/sq. The comparison of HEMT wafers with and without AlN interfacial layer shows that high Al content AlGaN/AlN/GaN heterostructures are potential in improving the electrical properties of HEMT structures and the device performances. (c) 2006 Elsevier B.V. All rights reserved.