991 resultados para Semi-Regular Operators
Resumo:
In this paper, we analyze and compare electrical compensation and deep level defects in semi-insulating ( SI) materials prepared by Fe-doping and high temperature annealing of undoped InP. Influence of deep level defects in the SI-InP materials on the electrical compensation has been studied thermally stimulated current spectroscopy (TSC). Electrical property of the Fe-doped SI-InP is deteriorated due to involvement of a high concentration of deep level defects in the compensation. In contrast, the concentration of deep defects is very low in high temperature annealed undoped SI-InP in which Fe acceptors formed by diffusion act as the only compensation centre to pin the Fermi level, resulting in excellent electrical performance. A more comprehensive electrical compensation model of SI-InP has been given based on the research results.
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By vertical sedimentation and oblique titration, silica microspheres were grown in different shapes of concave microzones that were etched on a (100) p-silicon substrate. Through scanning electron microscope observation and optical reflective spectra measurement, sedimentation of microspheres in those microzones was compared. An index was introduced to judge the efficiency of sedimentation. The comparison demonstrates that regular hexagons and triangles facilitate the growth of photonic crystals the most. (c) 2006 Optical Society of America
Resumo:
Contactless electroreflectance (CER) and photoreflectance (PR) measurements have been performed on samples with the structure of an n-doped GaAs epitaxial layer on a semi- insulating GaAs substrate. Modulated reflectance signals from the n-GaAs surface and those from the n-GaAs/SI-GaAs interface are superposed in PR spectra. For the case of CER measurement, however, Franz-Keldysh oscillations (FKOs) from the interface, which are observed in PR spectra, cannot be detected. This discrepancy is attributed to different modulation mechanisms of CER and PR. In CER experiments, the electric field modulation cannot be added to the interfacial electric field because of the effective screening by the fast response of carriers across the interface. FKOs from the interface without any perturbation by the surface signals are extracted by subtracting CER spectra from PR spectra.
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Because of information digitalization and the correspondence of digits and the coordinates, Information Science and high-dimensional space have consanguineous relations. With the transforming from the information issues to the point analysis in high-dimensional space, we proposed a novel computational theory, named High dimensional imagery geometry (HDIG). Some computational algorithms of HDIG have been realized using software, and how to combine with groups of simple operators in some 2D planes to implement the geometrical computations in high-dimensional space is demonstrated in this paper. As the applications, two kinds of experiments of HDIG, which are blurred image restoration and pattern recognition ones, are given, and the results are satisfying.
Resumo:
A passively Q-switched and mode-locked diode-pumped Nd:GdVO4 laser was demonstrated using a low-temperature-grown GaAs wafer (LT-GaAs) as an intracavity saturable absorber. The maximal Q-switched mode-locked average output power was 750 mW with the Q-switched envelop having a repetition rate of 167 kHz. The mode-locked pulse trains inside the Q-switched pulse envelope had a repetition rate of similar to 790 MHz.
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We propose a more general method for detecting a set of entanglement measures, i.e., negativities, in an arbitrary tripartite quantum state by local operations and classical communication. To accomplish the detection task using this method, three observers do not need to perform partial transposition maps by the structural physical approximation; instead, they only need to collectively measure some functions via three local networks supplemented by a classical communication. With these functions, they are able to determine the set of negativities related to the tripartite quantum state.
Resumo:
Self-ordered porous alumina films on a semi-insulated GaAs substrate were prepared in oxalic acid aqueous solutions by three-step anodization. The I-t curve of anodization process was recorded to observe time effects of anodization. Atomic force microscopy was used to investigate structure and morphology of alumina films. It was revealed that the case of oxalic acid resulted in a self-ordered porous structure, with the pore diameters of 60-70 nm, the pore density of the order of about 10(10) pore cm(-2), and interpore distances of 95-100nm. At the same time the pore size and shape change with the pore widening time. Field-enhanced dissolution model and theory of deformation relaxation combined were brought forward to be the cause of self-ordered pore structure according to I-t curve of anodization and structure characteristics of porous alumina films. (c) 2006 Elsevier Ltd. All rights reserved.
Resumo:
By vertical sedimentation, silica micro-spheres were grown in different shapes of concave micro-zones which were etched on a (100) p-silicon substrate. The following were found: this method can effectively raise the quality of films by avoiding cracks; the geometry of the micro-zones affects the sediment of the film; regular hexagons and triangles best facilitate the growth of photonic crystals. This method is practical for its ability to fabricate self-assembly photonic crystals in previously designed small areas.
Resumo:
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.
Resumo:
High resistivity unintentionally doped GaN films were grown on (0001) sapphire substrates by metalorganic chemical vapor deposition. The surface morphology of the layer was measured by both atomic force microscopy and scanning electron microscopy. The results show that the films have mirror-like surface morphology with root mean square of 0.3 nm. The full width at half maximum of double crystal X-ray diffraction rocking curve for (0002) GaN is about 5.22 arc-min, indicative of high crystal quality. The resistivity of the GaN epilayers at room temperature and at 250 degrees C was measured to be approximate 10(9) and 10(6) Omega(.)cm respectively, by variable temperature Hall measurement. Deep level traps in the GaN epilayers were investigated by thermally stimulated current and resistivity measurements.
Resumo:
Deep level defects in as-grown and annealed SI-InP samples were investigated by thermally stimulated current spectroscopy. Correlations between electrical property, compensation ratio, thermal stability and deep defect concentration in SI-InP were revealed. An optimized crystal growth condition for high quality SI-InP was demonstrated based on the experimental results.
Resumo:
We have investigated the annealing and activation of silicon implanted in both as-grown Fe-doped semi-insulating (SI) InP substrate and undoped SI InP substrate obtained by annealing high purity conductive InP wafer (wafer-annealed). Si implantations were performed at an energy of 500 keV and a dose of 1 X 10(15) cm(-2). Following the implantations, rapid thermal annealing (RTA) cycles were carried out for 30 s at different temperatures. The results of Raman measurements show that for 700degreesC/30s RTA, the two Si-implanted SI InP substrates have acquired a high degree of lattice recovery and electrical activation. However, further Hall measurements indicate that the carrier concentration of the wafer-annealed SI InP substrate is about three times higher than that of the as-grown Fe-doped SI InP substrate. The difference can be ascribed to the low Fe concentration of the wafer-annealed SI InP substrate.These experimental data imply that the use of the wafer-annealed SI InP substrate can be conducive to the improvement of InP-based device performances. (C) 2003 Elsevier Ltd. All rights reserved.
Resumo:
Low-indium-content self-assembled InGaAs/GaAs quantum dots (SAQD) were grown using solid-source molecular beam epitaxy (MBE) and investigated by atomic force microscopy and photoluminescence (PL) spectroscopy. Silicon, which was doped at different quantum dot (QD) growth stages, markedly increased the density of QD. We obtained high density In0.35Ga0.65As/GaAs(001) quantum dots of 10(11)/cm(2) at a growth temperature of 520degreesC. PL spectra and distribution statistics show the high quality and uniformity of our silicon-doped samples. The density increment can be explained using the lattice-hardening mechanism due to silicon doping.
Resumo:
The influence of gamma-radiation dose rate on the electrical properties of lead zirconate titanate capacitors was investigated. More severe degradations in dielectric constant, coercive field, remanent polarization and capacitance-voltage (C-V) curves occurred with increasing radiation dose at lower dose rates. The electrical properties exhibited distinct radiation dose rate dependence and the worst-case degradation occurred at the lowest dose rate. The radiation-induced degradation of parameters such as the coercive field drift and distortion of the C-V curve can be recovered partly through post-irradiation annealing.
Resumo:
This paper reports on the simulation of two 2 x 2 electrooptical switches with different modulation area structures in silicon-on-insulator (SOI). A two-dimensional (2D) semiconductor device simulation tool PISCES-II has been used to analyze the dc and transient behaviors of the two devices. The modeling results show that the switch with an N+-I-P+-I-N+ modulation structure has a much faster response speed than the device with a P+-I-N+ modulation structure, although the former requires slightly stronger injection power.