Dendrimers/TiO2 nanoparticles layer-by-layer films as extended gate FET for pH detection

The layer-by-layer (LbL) technique combined with field-effect transistor (FET) based sensors has enabled the production of pH-sensitive platforms with potential application in biosensors. A variation of the FET architecture, so called separative extended gate FET (SEGFET) devices, are promise as an alternative to conventional ion sensitive FET (ISFET). SEGFET configuration exhibits the advantage of combining the field-effect concept with organic and inorganic materials directly adsorbed on the extended gate, allowing the test of new pH-sensitive materials in a simple and low cost way. In this communication, poly(propylene imine) dendrimer (PPI) and TiO2 nanoparticles (TiO2-np) were assembled onto gold-covered substrates via layer-by-layer technique to produce a low cost SEGFET pH sensor. The sensor presented good pH sensitivity, ca. 57 mV pH(-1), showing that our strategy has potential advantages to fabricate low cost pH-sensing membranes. (C) 2012 Elsevier B.V. All rights reserved.

The Dependence of Retention Time on Gate Length in UTBOX FBRAM With Different Source/Drain Junction Engineering

The floating-body-RAM sense margin and retention-time dependence on the gate length is investigated in UTBOX devices using BJT programming combined with a positive back bias (so-called V th feedback). It is shown that the sense margin and the retention time can be kept constant versus the gate length by using a positive back bias. Nevertheless, below a critical L, there is no room for optimization, and the memory performances suddenly drop. The mechanism behind this degradation is attributed to GIDL current amplification by the lateral bipolar transistor with a narrow base. The gate length can be further scaled using underlap junctions.

Behavior of triple-gate Bulk FinFETs with and without DTMOS operation

In this paper, the combination of the Dynamic Threshold (DT) voltage technique with a non-planar structure is experimentally studied in triple-gate FinFETs. The drain current, transconductance, resistance, threshold voltage, subthreshold swing and Drain Induced Barrier Lowering (DIBL) will be analyzed in the DT mode and the standard biasing configuration. Moreover, for the first time, the important figures of merit for the analog performance such as transconductance-over-drain current, output conductance. Early voltage and intrinsic voltage gain will be studied experimentally and through three-dimensional (3-D) numerical simulations for different channel doping concentrations in triple-gate DTMOS FinFETs. The results indicate that the DTMOS FinFETs always yield superior characteristic; and larger transistor efficiency. In addition, DTMOS devices with a high channel doping concentration exhibit much better analog performance compared to the normal operation mode, which is desirable for high performance low-power/low-voltage applications. (C) 2011 Elsevier Ltd. All rights reserved.

Dependence of Generation-Recombination Noise With Gate Voltage in FD SOI MOSFETs

A model for computing the generation-recombination noise due to traps within the semiconductor film of fully depleted silicon-on-insulator MOSFET transistors is presented. Dependence of the corner frequency of the Lorentzian spectra on the gate voltage is addressed in this paper, which is different to the constant behavior expected for bulk transistors. The shift in the corner frequency makes the characterization process easier. It helps to identify the energy position, capture cross sections, and densities of the traps. This characterization task is carried out considering noise measurements of two different candidate structures for single-transistor dynamic random access memory devices.

Analysis of temperature variation influence on the analog performance of 45 degrees rotated triple-gate nMuGFETs

This work presents the analog performance of n-type triple-gate MuGFETs with high-k dielectrics and TiN gate material fabricated in 45 degrees rotated SOI substrates comparing their performance with standard MuGFETs fabricated without substrate rotation. Different fin widths are studied for temperatures ranging from 250 K up to 400 K. The results of transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and unit-gain frequency are studied. It is observed that the substrate rotation improves the carrier mobility of narrow MuGFETs at any temperature because of the changing in the conduction plane at the sidewalls from (1 1 0) to (1 0 0). For lower temperatures, the improvement of the carrier mobility of rotated MuGFETs is more noticeable as well as the rate of mobility improvement with the temperature decrease is larger. The output conductance is weakly affected by the substrate rotation. Although this improvement in the transconductance of rotated MuGFETs is negligibly transferred to the intrinsic voltage gain, the unity-gain frequency of rotated device is improved due to the larger carrier mobility in the entire range of temperatures studied. (C) 2011 Elsevier Ltd. All rights reserved.

GIDL behavior of p- and n-MuGFET devices with different TiN metal gate thickness and high-k gate dielectrics

This work studies the gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal gate thickness and high-k gate dielectrics. As a result of this analysis, it was observed that a thinner TiN metal gate showed a larger GIDL due to the different gate oxide thickness and a reduced metal gate work function. In addition, replacing SiON by a high-k dielectric (HfSiON) results for nMuGFETs in a decrease of the GIDL On the other hand, the impact of the gate dielectric on the GIDL for p-channel MuGFETs is marginal. The effect of the channel width was also studied, whereby narrow fin devices exhibit a reduced GIDL current in spite of the larger vertical electric field expected for these devices. Finally, comparing the effect of the channel type, an enhanced GIDL current for pMuGFET devices was observed. (C) 2011 Elsevier Ltd. All rights reserved.

Exact dynamics of single-qubit-gate fidelities under the measurement-based quantum computation scheme

Measurement-based quantum computation is an efficient model to perform universal computation. Nevertheless, theoretical questions have been raised, mainly with respect to realistic noise conditions. In order to shed some light on this issue, we evaluate the exact dynamics of some single-qubit-gate fidelities using the measurement-based quantum computation scheme when the qubits which are used as a resource interact with a common dephasing environment. We report a necessary condition for the fidelity dynamics of a general pure N-qubit state, interacting with this type of error channel, to present an oscillatory behavior, and we show that for the initial canonical cluster state, the fidelity oscillates as a function of time. This state fidelity oscillatory behavior brings significant variations to the values of the computational results of a generic gate acting on that state depending on the instants we choose to apply our set of projective measurements. As we shall see, considering some specific gates that are frequently found in the literature, the fast application of the set of projective measurements does not necessarily imply high gate fidelity, and likewise the slow application thereof does not necessarily imply low gate fidelity. Our condition for the occurrence of the fidelity oscillatory behavior shows that the oscillation presented by the cluster state is due exclusively to its initial geometry. Other states that can be used as resources for measurement-based quantum computation can present the same initial geometrical condition. Therefore, it is very important for the present scheme to know when the fidelity of a particular resource state will oscillate in time and, if this is the case, what are the best times to perform the measurements.

Early transplantation of human immature dental pulp stem cells from baby teeth to golden retriever muscular dystrophy (GRMD) dogs: Local or systemic?

Background:The golden retriever muscular dystrophy (GRMD) dogs represent the best available animal model for therapeutic trials aiming at the future treatment of human Duchenne muscular dystrophy (DMD). We have obtained a rare litter of six GRMD dogs (3 males and 3 females) born from an affected male and a carrier female which were submitted to a therapeutic trial with adult human stem cells to investigate their capacity to engraft into dogs muscles by local as compared to systemic injection without any immunosuppression. Methods Human Immature Dental Pulp Stem Cells (hIDPSC) were transplanted into 4 littermate dogs aged 28 to 40 days by either arterial or muscular injections. Two non-injected dogs were kept as controls. Clinical translation effects were analyzed since immune reactions by blood exams and physical scores capacity of each dog. Samples from biopsies were checked by immunohistochemistry (dystrophin markers) and FISH for human probes. Results and Discussion We analyzed the cells' ability in respect to migrate, engraftment, and myogenic potential, and the expression of human dystrophin in affected muscles. Additionally, the efficiency of single and consecutive early transplantation was compared. Chimeric muscle fibers were detected by immunofluorescence and fluorescent in situ hybridisation (FISH) using human antibodies and X and Y DNA probes. No signs of immune rejection were observed and these results suggested that hIDPSC cell transplantation may be done without immunosuppression. We showed that hIDPSC presented significant engraftment in GRMD dog muscles, although human dystrophin expression was modest and limited to several muscle fibers. Better clinical condition was also observed in the dog, which received monthly arterial injections and is still clinically stable at 25 months of age. Conclusion Our data suggested that systemic multiple deliveries seemed more effective than local injections. These findings open important avenues for further researches.

Oxidative processes during 'Golden' papaya fruit ripening

'Golden' papayas at maturity stage 1 (15% yellow skin) were chosen to study selected oxidative processes, the activity of antioxidant enzymes and lipid peroxidation in storage at 22°C, during the ripening of the fruit. An increase in ethylene production was observed on the second day of storage and it was followed by an increase in respiration. An increased activity of catalase, glutathione reductase and ascorbate peroxidase was observed concurrently or soon after this increase in ethylene production and respiration. The increased activity of these enzymes near the peaks of ethylene production and respiration is related to the production of oxidants accompanying the onset of ripening. On the fourth day of storage, there was an increased lipid peroxidation and decreased activities of catalase, glutathione reductase and superoxide dismutase. Lipid peroxidation induces the increase of antioxidant enzymes, which can be verified by further increases in the activities of catalase, glutathione reductase, superoxide dismutase and ascorbate peroxidase. Unlike the other antioxidant enzymes, the ascorbate peroxidase activity in the pulp increased continuously during ripening, suggesting its important role in combating reactive oxygen species during papaya ripening. With regard to physical-chemical characteristics, the soluble solids did not vary significantly, the acidity and ascorbic acid contents increased, and hue angle and firmness decreased during storage. The results revealed that there was variation in the activity of antioxidant enzymes, with peaks of lipid peroxidation during the ripening of 'Golden' papaya. These results provide a basis for future research, especially with regard to the relationships among the climacteric stage, the activation of antioxidant enzymes and the role of ascorbate peroxidase in papaya ripening.

Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects

The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new issues and new challenges are arising, and the conventional ”bulk” architecture is becoming inadequate in order to face them. In order to overcome the limitations related to conventional structures, the researchers community is preparing different solutions, that need to be assessed. Possible solutions currently under scrutiny are represented by: • devices incorporating materials with properties different from those of silicon, for the channel and the source/drain regions; • new architectures as Silicon–On–Insulator (SOI) transistors: the body thickness of Ultra-Thin-Body SOI devices is a new design parameter, and it permits to keep under control Short–Channel–Effects without adopting high doping level in the channel. Among the solutions proposed in order to overcome the difficulties related to scaling, we can highlight heterojunctions at the channel edge, obtained by adopting for the source/drain regions materials with band–gap different from that of the channel material. This solution allows to increase the injection velocity of the particles travelling from the source into the channel, and therefore increase the performance of the transistor in terms of provided drain current. The first part of this thesis work addresses the use of heterojunctions in SOI transistors: chapter 3 outlines the basics of the heterojunctions theory and the adoption of such approach in older technologies as the heterojunction–bipolar–transistors; moreover the modifications introduced in the Monte Carlo code in order to simulate conduction band discontinuities are described, and the simulations performed on unidimensional simplified structures in order to validate them as well. Chapter 4 presents the results obtained from the Monte Carlo simulations performed on double–gate SOI transistors featuring conduction band offsets between the source and drain regions and the channel. In particular, attention has been focused on the drain current and to internal quantities as inversion charge, potential energy and carrier velocities. Both graded and abrupt discontinuities have been considered. The scaling of devices dimensions and the adoption of innovative architectures have consequences on the power dissipation as well. In SOI technologies the channel is thermally insulated from the underlying substrate by a SiO2 buried–oxide layer; this SiO2 layer features a thermal conductivity that is two orders of magnitude lower than the silicon one, and it impedes the dissipation of the heat generated in the active region. Moreover, the thermal conductivity of thin semiconductor films is much lower than that of silicon bulk, due to phonon confinement and boundary scattering. All these aspects cause severe self–heating effects, that detrimentally impact the carrier mobility and therefore the saturation drive current for high–performance transistors; as a consequence, thermal device design is becoming a fundamental part of integrated circuit engineering. The second part of this thesis discusses the problem of self–heating in SOI transistors. Chapter 5 describes the causes of heat generation and dissipation in SOI devices, and it provides a brief overview on the methods that have been proposed in order to model these phenomena. In order to understand how this problem impacts the performance of different SOI architectures, three–dimensional electro–thermal simulations have been applied to the analysis of SHE in planar single and double–gate SOI transistors as well as FinFET, featuring the same isothermal electrical characteristics. In chapter 6 the same simulation approach is extensively employed to study the impact of SHE on the performance of a FinFET representative of the high–performance transistor of the 45 nm technology node. Its effects on the ON–current, the maximum temperatures reached inside the device and the thermal resistance associated to the device itself, as well as the dependence of SHE on the main geometrical parameters have been analyzed. Furthermore, the consequences on self–heating of technological solutions such as raised S/D extensions regions or reduction of fin height are explored as well. Finally, conclusions are drawn in chapter 7.

Clostridium difficile toxins facilitate bacterial colonization by modulating the fence and gate function of colonic epithelium

The contribution of Clostridium difficile toxin A and B (TcdA and TcdB) to cellular intoxication has been extensively studied, but their impact on bacterial colonization remains unclear. By setting-up two- and three-dimensional in vitro models of polarized gut epithelium, we investigated how C. difficile infection is affected by host cell polarity and whether TcdA and TcdB contribute to such events. Indeed, we observed that C. difficile adhesion and penetration of the epithelial barrier is substantially enhanced in poorly polarized or EGTA-treated cells, indicating that bacteria bind preferentially to the basolateral cell surface. In this context, we demonstrated that sub-lethal concentrations of C. difficile TcdA are able to alter cell polarity by causing redistribution of plasma membrane components between distinct surface domains. Taken together, the data suggest that toxin-mediated modulation of host cell organization may account for the capacity of this opportunistic pathogen to gain access to basolateral receptors leading to a successful colonization of the colonic mucosa.

Tradurre il fantasy per giovani lettori: "The Explorers' gate" di Chris Grabenstein

The purpose of this thesis is, on the one hand, to illustrate the peculiarities of children’s literature, fantasy fiction and their translation and, on the other hand, to propose a translation from English to Italian of some chapters of the e-book The Explorers’ Gate by American author Chris Grabenstein. The first chapters of this work offer an analysis of different critical studies on children’s literature and fantasy fiction and illustrate the characteristics of these two literary expressions. I will also discuss the different approaches to their translation in order to produce a translated text that is consistent with its literary genre and with translation theories. The third chapter is about the author and includes an interview on his idea of children’s literature and his opinions about translation. The second part of this thesis is represented by the actual translation of the e-book. Firstly, I will analyze the source text, dividing the analysis in extra-textual and intra- textual and focusing on sender, addressee, time and space, function of the text, plot, structure, narrator, style and language used by the author. I will also highlight those elements that probably would be challenging during the translation phase. Secondly, I will explain the macro-strategy that I adopted during the process of translation, which can be defined as child-oriented. In the last chapter I will highlight those passages that represented translation challenges and I will show how I tackled them.

Named Entity Extraction: la piattaforma Gate/Annie

In questo lavoro si introducono i concetti di base di Natural Language Processing, soffermandosi su Information Extraction e analizzandone gli ambiti applicativi, le attività principali e la differenza rispetto a Information Retrieval. Successivamente si analizza il processo di Named Entity Recognition, focalizzando l’attenzione sulle principali problematiche di annotazione di testi e sui metodi per la valutazione della qualità dell’estrazione di entità. Infine si fornisce una panoramica della piattaforma software open-source di language processing GATE/ANNIE, descrivendone l’architettura e i suoi componenti principali, con approfondimenti sugli strumenti che GATE offre per l'approccio rule-based a Named Entity Recognition.