Effect of substrate bias voltage on the structure, electric and dielectric properties of TiO(2) thin films by DC magnetron sputtering

Titanium dioxide (TiO(2)) films have been deposited on glass and p-silicon (1 0 0) substrates by DC magnetron sputtering technique to investigate their structural, electrical and optical properties. The surface composition of the TiO(2) films has been analyzed by X-ray photoelectron spectroscopy. The TiO(2) films formed on unbiased substrates were amorphous. Application of negative bias voltage to the substrate transformed the amorphous TiO(2) into polycrystalline as confirmed by Raman spectroscopic studies. Thin film capacitors with configuration of Al/TiO(2)/p-Si have been fabricated. The leakage current density of unbiased films was 1 x10(-6) A/cm(2) at a gate bias voltage of 1.5 V and it was decreased to 1.41 x 10(-7) A/cm(2) with the increase of substrate bias voltage to -150 V owing to the increase in thickness of interfacial layer of SiO(2). Dielectric properties and AC electrical conductivity of the films were studied at various frequencies for unbiased and biased at -150 V. The capacitance at 1 MHz for unbiased films was 2.42 x 10(-10) F and it increased to 5.8 x 10(-10) F in the films formed at substrate bias voltage of -150 V. Dielectric constant of TiO(2) films were calculated from capacitance-voltage measurements at 1 MHz frequency. The dielectric constant of unbiased films was 6.2 while those formed at -150 V it increased to 19. The optical band gap of the films decreased from 3.50 to 3.42 eV with the increase of substrate bias voltage from 0 to -150 V. (C) 2011 Elsevier B. V. All rights reserved.

High voltage DC power supply topology for pulsed load applications with converter switching synchronized to load pulses

High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

Input voltage modulated high voltage DC power supply topology for pulsed load applications

High voltage power supplies for radar applications are investigated which are subjected to pulsed load with stringent specifications. In the proposed solution, power conversion is done in two stages. A low power-high frequency converter modulates the input voltage of a high power-low frequency converter. This method satisfies all the performance specifications and takes care of the critical aspects of HV transformer.

Structural and electrical properties of low pressure metalorganic chemical vapor deposition grown Eu2O3 films on Si(100)

Structural and electrical properties of Eu2O3 films grown on Si(100) in 500–600 °C temperature range by low pressure metalorganic chemical vapor deposition are reported. As-grown films also possess the impurity Eu1−xO phase, which has been removed upon annealing in O2 ambient. Film’s morphology comprises uniform spherical mounds (40–60 nm). Electrical properties of the films, as examined by capacitance-voltage measurements, exhibit fixed oxide charges in the range of −1.5×1011 to −6.0×1010 cm−2 and dielectric constant in the range of 8–23. Annealing has resulted in drastic improvement of their electrical properties. Effect of oxygen nonstoichiometry on the film’s property is briefly discussed.

Elerctron Transport Coefficients in N2 in Crossed Fields at Low E/p

The numerical solutions of Boltzmann transpott equation for the energy distribution of electrons moving in crossed fields in nitrogen have been obtained for 100 ÿ E/p ÿ 1000 V M-1 Torr-1 and for 0ÿ B/p ÿ 0.02 Tesla Torr-1 using the concept of energy dependent effective field intensity. From the derived distribution functions the electron mean energy, the tranaverse and perpendicular drift velocities and the averaged effective field intensity (Eavef) which signifies the average field intensity experienced by electron swarms in E àB field have been derived. The maximum difference between the electron mean energy for a given E ÃÂB field and that corresponding to Eavef/p (p is the gas pressure) is found to be within ñ3.5%.

Fast Direct Torque Control of an Open-End Induction Motor Drive Using 12-Sided Polygonal Voltage Space Vectors

A torque control scheme, based on a direct torque control (DTC) algorithm using a 12-sided polygonal voltage space vector, is proposed for a variable speed control of an open-end induction motor drive. The conventional DTC scheme uses a stator flux vector for the sector identification and then the switching vector to control stator flux and torque. However, the proposed DTC scheme selects switching vectors based on the sector information of the estimated fundamental stator voltage vector and its relative position with respect to the stator flux vector. The fundamental stator voltage estimation is based on the steady-state model of IM and the synchronous frequency of operation is derived from the computed stator flux using a low-pass filter technique. The proposed DTC scheme utilizes the exact positions of the fundamental stator voltage vector and stator flux vector to select the optimal switching vector for fast control of torque with small variation of stator flux within the hysteresis band. The present DTC scheme allows full load torque control with fast transient response to very low speeds of operation, with reduced switching frequency variation. Extensive experimental results are presented to show the fast torque control for speed of operation from zero to rated.

Effect of power line filter on MOV clamping voltage

Metal oxide varistors (MOV) are popularly used to protect offline electronic equipment against power line transients. The offline switched mode power supplies (SMPS) use power line filters and MOVs in the front-end. The power line filter is used to reduce the conducted noise emission into the power line and the MOVs connected before this line filter and the MOVs connected before this line filter to clamp line transients to safer levels thereby protecting the SMPS. Because of the presence of 'X' capacitors at the input of line filter the MOV clamping voltage is increased. This paper presents one such case and gives theoretical and experimental results. An approximate method to predetermine the magnitude of such clamping voltages is also presented.

Microelectromechanical torsional varactors with low parasitic capacitances and high dynamic range

This work focuses on the design of torsional microelectromechanical systems (MEMS) varactors to achieve highdynamic range of capacitances. MEMS varactors fabricated through the polyMUMPS process are characterized at low and high frequencies for their capacitance-voltage characteristics and electrical parasitics. The effect of parasitic capacitances on tuning ratio is studied and an equivalent circuit is developed. Two variants of torsional varactors that help to improve the dynamic range of torsional varactors despite the parasitics are proposed and characterized. A tuning ratio of 1:8, which is the highest reported in literature, has been obtained. We also demonstrate through simulations that much higher tuning ratios can be obtained with the designs proposed. The designs and experimental results presented are relevant to CMOS fabrication processes that use low resistivity substrate. (C) 2012 Society of Photo-Optical Instrumentation Engineers (SPIE). DOI: 10.1117/1.JMM.11.1.013006]

Endurance of Nafion-composite membranes in PEFCs operating at elevated temperature under low relative-humidity

PEFCs employing Nafion-silica (Nafion-SiO2) and Nafion-mesoporous zirconium phosphate (Nafion-MZP) composite membranes are subjected to accelerated-durability test at 100 degrees C and 15% relative humidity (RH) at open-circuit voltage (OCV) for 50 h and performance compared with the PEFC employing pristine Nafion-1135 membrane. PEFCs with composite membranes sustain the operating voltage better with fluoride-ion-emission rate at least an order of magnitude lower than PEFC with pristine Nafion-1135 membrane. Reduced gas-crossover, fast fuel-cell-reaction kinetics and superior performance of the PEFCs with Nafion-SiO2 and Nafion-MZP composite membranes in relation to the PEFC with pristine Nafion-1135 membrane support the long-term operational usage of the former in PEFCs. An 8-cell PEFC stack employing Nafion-SiO2 composite membrane is also assembled and successfully operated at 60 degrees C without external humidification.

A Hybrid Five-Level Inverter With Common-Mode Voltage Elimination Having Single Voltage Source for IM Drive Applications

A new hybrid five-level inverter topology with common-mode voltage (CMV) elimination for induction motor drive is proposed in this paper. This topology has only one dc source, and different voltage levels are generated by using this voltage source along with floating capacitors charged to asymmetrical voltage levels. The pulsewidth modulation (PWM) scheme employed in this topology balances the capacitor voltages at the required levels at any power factor and modulation index while eliminating the CMV. This inverter has good fault-tolerant capability as it can be operated in three-or two-level mode with CMV elimination, in case of any failure in the H-bridges. More voltage levels with CMV elimination can be realized from this topology but only in a limited range of modulation index and power factor. Extensive simulation is done to validate the PWM technique for CMV elimination and balancing of the capacitor voltages. The experimental verification of the proposed inverter-fed induction motor is carried out in the linear modulation and overmodulation regions. The steady-state and transient operations of the drive are verified. The dynamics of the capacitor voltage balancing is also tested. The experimental results demonstrate that the proposed topology can be considered for industrial drive applications.

Multilevel Dodecagonal Voltage Space Vector Generation using Flying Capacitor topology for Induction motor drives

In this paper, a multilevel flying capacitor inverter topology suitable for generating multilevel dodecagonal space vectors for an induction motor drive, is proposed. Because of the dodecagonal space vectors, it has increased modulation range with the absence of all 6n +/- 1, (n=odd) harmonics in the phase voltage and currents. The topology, realized by flying capacitor three level inverters feeding an open-end winding induction motor, does not suffer the neutral point voltage imbalance issues seen in NPC inverters and the capacitors have inherent charge-balancing capability with PWM control using switching state redundancies. Furthermore, the proposed technique uses lesser number of power supplies compared to cascaded H-bridge or NPC based dodecagonal schemes and has better ride-through capability. Finally, the voltage control is obtained through a simple carrier-based space vector PWM scheme implemented on a DSP.

Effect of Temperature Cycling on Conduction Mechanisms in CdTe Thin Films

CdTe thin films of 500 thickness prepared by thermal evaporation technique were analyzed for leakage current and conduction mechanisms. Metal-insulator-metal (MIM) capacitors were fabricated using these films as a dielectric. These films have many possible applications, such as passivation for infrared diodes that operate at low temperatures (80 K). Direct-current (DC) current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on these films. Furthermore, the films were subjected to thermal cycling from 300 K to 80 K and back to 300 K. Typical minimum leakage currents near zero bias at room temperature varied between 0.9 nA and 0.1 mu A, while low-temperature leakage currents were in the range of 9.5 pA to 0.5 nA, corresponding to resistivity values on the order of 10(8) a''broken vertical bar-cm and 10(10) a''broken vertical bar-cm, respectively. Well-known conduction mechanisms from the literature were utilized for fitting of measured I-V data. Our analysis indicates that the conduction mechanism in general is Ohmic for low fields < 5 x 10(4) V cm(-1), while the conduction mechanism for fields > 6 x 10(4) V cm(-1) is modified Poole-Frenkel (MPF) and Fowler-Nordheim (FN) tunneling at room temperature. At 80 K, Schottky-type conduction dominates. A significant observation is that the film did not show any appreciable degradation in leakage current characteristics due to the thermal cycling.

A low-noise low-power noise-adaptive neural amplifier in 0.13um CMOS technology

Chronic recording of neural signals is indispensable in designing efficient brain machine interfaces and in elucidating human neurophysiology. The advent of multichannel microelectrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system is limited by background system noise which varies over time. We propose a neural amplifier in UMC 130 nm, 2P8M CMOS technology. It can be biased adaptively from 200 nA to 2 uA, modulating input referred noise from 9.92 uV to 3.9 uV. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. The amplifier can pass signal from 5 Hz to 7 kHz while rejecting input DC offsets at electrode-electrolyte interface. The bandwidth of the amplifier can be tuned by the pseudo-resistor for selectively recording low field potentials (LFP) or extra cellular action potentials (EAP). The amplifier achieves a mid-band voltage gain of 37 dB and minimizes the attenuation of the signal from neuron to the gate of the input transistor. It is used in fully differential configuration to reject noise of bias circuitry and to achieve high PSRR.

Performance and reliability of Gd2O3 and stacked Gd2O3-Eu2O3 metal-insulator-metal capacitors

Gd2O3-based metal-insulator-metal capacitors have been characterized with single layer (Gd2O3) and bilayer (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) stacks for analog and DRAM applications. Although single layer Gd2O3 capacitors provide highest capacitance density (15 fF/mu m(2)), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density (1.2x10(-5) A/cm(2) and 2.7 x 10(-5) A/cm(2) for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at -1 V), improve quadratic voltage coefficient of capacitance (331 ppm/V-2 and 374 ppm/V-2 for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole-Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.

Structural, electrical and dielectric properties of sputtered TiO2 films for Al/TiO2/Si capacitors

Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.