Abstraction: From Transistors to Computers and from Bits to Programs

Takes the Tanenbaum (Structured Computer Organisation) approach to show how application of successive levels of abstraction allow us to understand how computers are made from transitors and how they are programmed.

Electrochemical single-molecule transistors with optimized gate coupling

Electrochemical gating at the single molecule level of viologen molecular bridges in ionic liquids is examined. Contrary to previous data recorded in aqueous electrolytes, a clear and sharp peak in the single molecule conductance versus electrochemical potential data is obtained in ionic liquids. These data are rationalized in terms of a two-step electrochemical model for charge transport across the redox bridge. In this model the gate coupling in the ionic liquid is found to be fully effective with a modeled gate coupling parameter, ξ, of unity. This compares to a much lower gate coupling parameter of 0.2 for the equivalent aqueous gating system. This study shows that ionic liquids are far more effective media for gating the conductance of single molecules than either solid-state three-terminal platforms created using nanolithography, or aqueous media.

Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors

The mixed-signal and analog design on a pre-diffused array is a challenging task, given that the digital array is a linear matrix arrangement of minimum-length transistors. To surmount this drawback a specific discipline for designing analog circuits over such array is required. An important novel technique proposed is the use of TAT (Trapezoidal Associations of Transistors) composite transistors on the semi-custom Sea-Of-Transistors (SOT) array. The analysis and advantages of TAT arrangement are extensively analyzed and demonstrated, with simulation and measurement comparisons to equivalent single transistors. Basic analog cells were also designed as well in full-custom and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a fully differential 2nd order Sigma-Delta Analog-to-Digital (A/D) modulator, fabricated in both full-custom and SOT array methodologies in 0.5mm CMOS technology from MOSIS foundry. Three test-chips were designed and fabricated in 0.5mm. Two of them are IC chips containing the full-custom and SOT array versions of a 2nd-Order Sigma-Delta A/D modulator. The third IC contains a transistors-structure (TAT and single) and analog cells placed side-by-side, block components (Comparator and Folded-cascode OTA) of the Sigma-Delta modulator.

Multiscale sensing of antibody - antigen interactions by organic transistors and single-molecule force spectroscopy

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire Transistors

This paper proposes a drain current model for triple-gate n-type junctionless nanowire transistors. The model is based on the solution of the Poisson equation. First, the 2-D Poisson equation is used to obtain the effective surface potential for long-channel devices, which is used to calculate the charge density along the channel and the drain current. The solution of the 3-D Laplace equation is added to the 2-D model in order to account for the short-channel effects. The proposed model is validated using 3-D TCAD simulations where the drain current and its derivatives, the potential, and the charge density have been compared, showing a good agreement for all parameters. Experimental data of short- channel devices down to 30 nm at different temperatures have been also used to validate the model.

A novel self consistent calculation approach for the capacitance-voltage characteristics of semiconductor quantum wire transistors based on a split-gate configuration

Purpose - The purpose of this paper is to develop an efficient numerical algorithm for the self-consistent solution of Schrodinger and Poisson equations in one-dimensional systems. The goal is to compute the charge-control and capacitance-voltage characteristics of quantum wire transistors. Design/methodology/approach - The paper presents a numerical formulation employing a non-uniform finite difference discretization scheme, in which the wavefunctions and electronic energy levels are obtained by solving the Schrodinger equation through the split-operator method while a relaxation method in the FTCS scheme ("Forward Time Centered Space") is used to solve the two-dimensional Poisson equation. Findings - The numerical model is validated by taking previously published results as a benchmark and then applying them to yield the charge-control characteristics and the capacitance-voltage relationship for a split-gate quantum wire device. Originality/value - The paper helps to fulfill the need for C-V models of quantum wire device. To do so, the authors implemented a straightforward calculation method for the two-dimensional electronic carrier density n(x,y). The formulation reduces the computational procedure to a much simpler problem, similar to the one-dimensional quantization case, significantly diminishing running time.

The zero temperature coefficient in junctionless nanowire transistors

This Letter presents an analysis of the zero temperature coefficient (ZTC) bias in junctionless nanowire transistors (JNTs). Unlike in previous works, which had shown that JNT did not present a ZTC point, this work shows that ZTC may occur in JNTs depending mainly on the series resistance of the devices and its dependence on the temperature. Experimental results of drain current, threshold voltage, and series resistance are presented for both long and short channel n and p-type devices. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4744965]

In situ real-time investigation of Organic Ultra-Thin-Film transistors: growth, electrical properties and biosensing applications

Organic electronics has grown enormously during the last decades driven by the encouraging results and the potentiality of these materials for allowing innovative applications, such as flexible-large-area displays, low-cost printable circuits, plastic solar cells and lab-on-a-chip devices. Moreover, their possible field of applications reaches from medicine, biotechnology, process control and environmental monitoring to defense and security requirements. However, a large number of questions regarding the mechanism of device operation remain unanswered. Along the most significant is the charge carrier transport in organic semiconductors, which is not yet well understood. Other example is the correlation between the morphology and the electrical response. Even if it is recognized that growth mode plays a crucial role into the performance of devices, it has not been exhaustively investigated. The main goal of this thesis was the finding of a correlation between growth modes, electrical properties and morphology in organic thin-film transistors (OTFTs). In order to study the thickness dependence of electrical performance in organic ultra-thin-film transistors, we have designed and developed a home-built experimental setup for performing real-time electrical monitoring and post-growth in situ electrical characterization techniques. We have grown pentacene TFTs under high vacuum conditions, varying systematically the deposition rate at a fixed room temperature. The drain source current IDS and the gate source current IGS were monitored in real-time; while a complete post-growth in situ electrical characterization was carried out. At the end, an ex situ morphological investigation was performed by using the atomic force microscope (AFM). In this work, we present the correlation for pentacene TFTs between growth conditions, Debye length and morphology (through the correlation length parameter). We have demonstrated that there is a layered charge carriers distribution, which is strongly dependent of the growth mode (i.e. rate deposition for a fixed temperature), leading to a variation of the conduction channel from 2 to 7 monolayers (MLs). We conciliate earlier reported results that were apparently contradictory. Our results made evident the necessity of reconsidering the concept of Debye length in a layered low-dimensional device. Additionally, we introduce by the first time a breakthrough technique. This technique makes evident the percolation of the first MLs on pentacene TFTs by monitoring the IGS in real-time, correlating morphological phenomena with the device electrical response. The present thesis is organized in the following five chapters. Chapter 1 makes an introduction to the organic electronics, illustrating the operation principle of TFTs. Chapter 2 presents the organic growth from theoretical and experimental points of view. The second part of this chapter presents the electrical characterization of OTFTs and the typical performance of pentacene devices is shown. In addition, we introduce a correcting technique for the reconstruction of measurements hampered by leakage current. In chapter 3, we describe in details the design and operation of our innovative home-built experimental setup for performing real-time and in situ electrical measurements. Some preliminary results and the breakthrough technique for correlating morphological and electrical changes are presented. Chapter 4 meets the most important results obtained in real-time and in situ conditions, which correlate growth conditions, electrical properties and morphology of pentacene TFTs. In chapter 5 we describe applicative experiments where the electrical performance of pentacene TFTs has been investigated in ambient conditions, in contact to water or aqueous solutions and, finally, in the detection of DNA concentration as label-free sensor, within the biosensing framework.

Organic heterostructure approach for multifunctional light-emitting field-effect transistors

The possibility of combining different functionalities in a single device is of great relevance for further development of organic electronics in integrated components and circuitry. Organic light-emitting transistors (OLETs) have been demonstrated to be able to combine in a single device the electrical switching functionality of a field-effect transistor and the capability of light generation. A novel strategy in OLET realization is the tri-layer vertical hetero-junction. This configuration is similar to the bi-layer except for the presence of a new middle layer between the two transport layers. This “recombination” layer presents high emission quantum efficiency and OLED-like (Organic Light-Emitting Diode) vertical bulk mobility value. The key idea of the vertical tri-layer hetero-junction approach in realizing OLETs is that each layer has to be optimized according to its specific function (charge transport, energy transfer, radiative exciton recombination). Clearly, matching the overall device characteristics with the functional properties of the single materials composing the active region of the OFET, is a great challenge that requires a deep investigation of the morphological, optical and electrical features of the system. As in the case of the bi-layer based OLETs, it is clear that the interfaces between the dielectric and the bottom transport layer and between the recombination and the top transport layer are crucial for guaranteeing good ambipolar field-effect electrical characteristics. Moreover interfaces between the bottom transport and the recombination layer and between the recombination and the top transport layer should provide the favourable conditions for the charge percolation to happen in the recombination layer and form excitons. Organic light emitting transistor based on the tri-layer approach with external quantum efficiency out-performing the OLED state of the art has been recently demonstrated [Capelli et al., Nat. Mater. 9 (2010) 496-503] widening the scientific and technological interest in this field of research.

Electrothermal characterization and nonlinear modelling of GaN transistors for telecommunication circuit design

This thesis starts showing the main characteristics and application fields of the AlGaN/GaN HEMT technology, focusing on reliability aspects essentially due to the presence of low frequency dispersive phenomena which limit in several ways the microwave performance of this kind of devices. Based on an equivalent voltage approach, a new low frequency device model is presented where the dynamic nonlinearity of the trapping effect is taken into account for the first time allowing considerable improvements in the prediction of very important quantities for the design of power amplifier such as power added efficiency, dissipated power and internal device temperature. An innovative and low-cost measurement setup for the characterization of the device under low-frequency large-amplitude sinusoidal excitation is also presented. This setup allows the identification of the new low frequency model through suitable procedures explained in detail. In this thesis a new non-invasive empirical method for compact electrothermal modeling and thermal resistance extraction is also described. The new contribution of the proposed approach concerns the non linear dependence of the channel temperature on the dissipated power. This is very important for GaN devices since they are capable of operating at relatively high temperatures with high power densities and the dependence of the thermal resistance on the temperature is quite relevant. Finally a novel method for the device thermal simulation is investigated: based on the analytical solution of the tree-dimensional heat equation, a Visual Basic program has been developed to estimate, in real time, the temperature distribution on the hottest surface of planar multilayer structures. The developed solver is particularly useful for peak temperature estimation at the design stage when critical decisions about circuit design and packaging have to be made. It facilitates the layout optimization and reliability improvement, allowing the correct choice of the device geometry and configuration to achieve the best possible thermal performance.

Numerical study of graphene as a channel material for field-effect transistors

Graphene excellent properties make it a promising candidate for building future nanoelectronic devices. Nevertheless, the absence of an energy gap is an open problem for the transistor application. In this thesis, graphene nanoribbons and pattern-hydrogenated graphene, two alternatives for inducing an energy gap in graphene, are investigated by means of numerical simulations. A tight-binding NEGF code is developed for the simulation of GNR-FETs. To speed up the simulations, the non-parabolic effective mass model and the mode-space tight-binding method are developed. The code is used for simulation studies of both conventional and tunneling FETs. The simulations show the great potential of conventional narrow GNR-FETs, but highlight at the same time the leakage problems in the off-state due to various tunneling mechanisms. The leakage problems become more severe as the width of the devices is made larger, and thus the band gap smaller, resulting in a poor on/off current ratio. The tunneling FET architecture can partially solve these problems thanks to the improved subthreshold slope; however, it is also shown that edge roughness, unless well controlled, can have a detrimental effect in the off-state performance. In the second part of this thesis, pattern-hydrogenated graphene is simulated by means of a tight-binding model. A realistic model for patterned hydrogenation, including disorder, is developed. The model is validated by direct comparison of the momentum-energy resolved density of states with the experimental angle-resolved photoemission spectroscopy. The scaling of the energy gap and the localization length on the parameters defining the pattern geometry is also presented. The results suggest that a substantial transport gap can be attainable with experimentally achievable hydrogen concentration.

Transistors elettrochimici organici e la loro applicazione come sensori.

La presente tesi tratta della fabbricazione e del funzionamento di transistors elettrochimici organici (OECTs) composti da fi�lm sottili di poly(3,4-ethylenedioxythiophene) disperso con polystyrenesulfonic acid, o PEDOT:PSS, oltre che del loro possibile utilizzo come sensori. La trattazione si apre con una panoramica sui polimeri conduttivi, siano essi puri o drogati, e sulle loro caratteristiche chimiche ed elettriche: diversi metodi di drogaggio consentono il loro utilizzo come semiconduttori. Tra questi polimeri, il PEDOT �e uno dei pi�u utilizzati poich�e presenta accessibilit�a d'uso e ottima stabilit�a nel suo stato drogato, pur risultando insolubile in acqua; per ovviare a questo problema lo si polimerizza con PSS. Le propriet�a di questo composto sono poi ampiamente discusse, soprattutto in ambito di applicazioni tecniche, per le quali �e neccessario che il polimero in soluzione sia depositato su un substrato. A questo scopo vengono presentate le principali techiche che consentono la deposizione, permettendo di creare fil�lm sottili di materiale da utilizzarsi, nell'ambito di questa tesi, come gate e canale dei transistors elettrochimici. A seguire viene esposta la struttura degli OECTs e spiegato il loro funzionamento, modellizzando i dispositivi con un semplice circuito elettrico. Il confronto dei meno noti OECTs con i meglio conosciuti transistors a eff�etto campo semplifi�ca la comprensione del funzionamento dei primi, i quali sono rilevanti ai fi�ni di questa trattazione per il loro possibile funzionamento come sensori. In seguito alla spiegazione teorica, vengono illustrati i metodi seguiti per la deposizione di �film sottili di PEDOT:PSS tramite Spin Coating e per la fabbricazione degli OECTs su cui sono state eff�ettuate le misure, le quali sono state scelte e presentate in base ai risultati gi�a ottenuti in letteratura e a seconda dei dati ritenuti necessari alla caratterizzazione del transistor elettrochimico nell'ottica di un suo possibile utilizzo come sensore. Perci�o sono state eseguite misure amperometriche in funzione delle tensioni di gate e di drain, alternatamente tenendo costante una e variando l'altra, oltre che in funzione della concentrazione di elettrolita, dell'area del canale e del tempo. In conclusione sono presentati i dati sperimentali ottenuti ed una loro analisi.