Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire Transistors
| Contribuinte(s) |
UNIVERSIDADE DE SÃO PAULO |
|---|---|
| Data(s) |
20/09/2013
20/09/2013
2012
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| Resumo |
This paper proposes a drain current model for triple-gate n-type junctionless nanowire transistors. The model is based on the solution of the Poisson equation. First, the 2-D Poisson equation is used to obtain the effective surface potential for long-channel devices, which is used to calculate the charge density along the channel and the drain current. The solution of the 3-D Laplace equation is added to the 2-D model in order to account for the short-channel effects. The proposed model is validated using 3-D TCAD simulations where the drain current and its derivatives, the potential, and the charge density have been compared, showing a good agreement for all parameters. Experimental data of short- channel devices down to 30 nm at different temperatures have been also used to validate the model. CAPES CAPES FAPESP FAPESP CNPq CNPq |
| Identificador |
IEEE TRANSACTIONS ON ELECTRON DEVICES, PISCATAWAY, v. 59, n. 12, pp. 3510-3518, DEC, 2012 0018-9383 http://www.producao.usp.br/handle/BDPI/33550 10.1109/TED.2012.2219055 |
| Idioma(s) |
eng |
| Publicador |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC PISCATAWAY |
| Relação |
IEEE TRANSACTIONS ON ELECTRON DEVICES |
| Direitos |
restrictedAccess Copyright IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| Palavras-Chave | #DRAIN CURRENT MODEL #JUNCTIONLESS NANOWIRE TRANSISTORS (JNTS) #SHORT-CHANNEL EFFECTS (SCES) #TEMPERATURE DEPENDENCE #ANALOG APPLICATIONS #SOI MOSFET #DESIGN #DEVICE #ENGINEERING, ELECTRICAL & ELECTRONIC #PHYSICS, APPLIED |
| Tipo |
article original article publishedVersion |
