El aprendizaje activo de la microbiología en el Grado de Podología incrementa el rendimiento académico

Se ha planteado como objetivo la mejora de la calidad de la docencia de la Microbiología mediante la actualización de la metodología docente , introduciendo como actividad docente el aprendizaje activo basado en preguntas (inquirybased learning:IBL) para conseguir mejorar las competencias que deberán adquirir los estudiantes como parte de su formación integral. En este estudio han participado 55 alumnos de Segundo Curso del Grado de Podología (Curso 2014-2015),y se ha calculado el porcentaje de alumnos que participaron en las 3 pruebas (3 IBL), en 2 (2 IBL), en 1 (1 IBL), y los que no participaron en ninguna y posteriormente se relacionó con las calificaciones obtenidas en la asignatura de Microbiología. Se incluyeron las preguntas IBL que se realizaron en clase en el campus virtual de la asignatura, pero sin incluir la corrección de las mismas. En los alumnos que realizaron alguna prueba IBL se obtuvieron calificaciones mejores en las preguntas diseñadas para analizar la síntesis de conocimientos y el análisis de datos que en aquellos que no habían participado en ninguna. Al finalizar la actividad se realizó un estudio transversal a través de un cuestionario autocumplimentado en el que se valoraba la opinión de los alumnos sobre el aprendizaje activo mediante IBL valorando positivamente esta actividad para medir el aprendizaje y mejorar la preparación del examen. Consideramos que el uso del campus virtual unido a la actualización en la metodología docente puede mejorar el rendimiento académico de los estudiantes de Microbiología.

Generic SoC QR Array Processor for Adaptive Beamforming

A generic architecture for implementing a QR array processor in silicon is presented. This improves on previous research by considerably simplifying the derivation of timing schedules for a QR system implemented as a folded linear array, where account has to be taken of processor cell latency and timing at the detailed circuit level. The architecture and scheduling derived have been used to create a generator for the rapid design of System-on-a-Chip (SoC) cores for QR decomposition. This is demonstrated through the design of a single-chip architecture for implementing an adaptive beamformer for radar applications. Published as IEEE Trans Circuits and Systems Part II, Analog and Digital Signal Processing, April 2003 NOT Express Briefs. Parts 1 and II of Journal reorganised since then into Regular Papers and Express briefs

Online CORDIC algorithm and VLSI architecture for implementing QR-array processors

A novel most significant digit first CORDIC architecture is presented that is suitable for the VLSI design of systolic array processor cells for performing QR decomposition. This is based on an on-line CORDIC algorithm with a constant scale factor and a latency independent of the wordlength. This has been derived through the extension of previously published CORDIC algorithms. It is shown that simplifying the calculation of convergence bounds also greatly simplifies the derivation of suitable VLSI architectures. Design studies, based on a 0.35-µ CMOS standard cell process, indicate that 20 such QR processor cells operating at rates suitable for radar beamfoming can be readily accommodated on a single chip.

Linear QR architecture for a single chip adaptive beamformer

This paper presents the design of a novel single chip adaptive beamformer capable of performing 50 Gflops, (Giga-floating-point operations/second). The core processor is a QR array implemented on a fully efficient linear systolic architecture, derived using a mapping that allows individual processors for boundary and internal cell operations. In addition, the paper highlights a number of rapid design techniques that have been used to realise this system. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilisation of a library of parameterisable silicon intellectual property (IP) cores, to rapidly develop detailed silicon designs.

QR decomposition-based matrix inversion for high performance embedded MIMO receivers

Real-time matrix inversion is a key enabling technology in multiple-input multiple-output (MIMO) communications systems, such as 802.11n. To date, however, no matrix inversion implementation has been devised which supports real-time operation for these standards. In this paper, we overcome this barrier by presenting a novel matrix inversion algorithm which is ideally suited to high performance floating-point implementation. We show how the resulting architecture offers fundamentally higher performance than currently published matrix inversion approaches and we use it to create the first reported architecture capable of supporting real-time 802.11n operation. Specifically, we present a matrix inversion approach based on modified squared Givens rotations (MSGR). This is a new QR decomposition algorithm which overcomes critical limitations in other QR algorithms that prohibits their application to MIMO systems. In addition, we present a novel modification that further reduces the complexity of MSGR by almost 20%. This enables real-time implementation with negligible reduction in the accuracy of the inversion operation, or the BER of a MIMO receiver based on this.

Generic scheduling methods for a linear QR array SoC processor

A scheduling method for implementing a generic linear QR array processor architecture is presented. This improves on previous work. It also considerably simplifies the derivation of schedules for a folded linear system, where detailed account has to be taken of processor cell latency. The architecture and scheduling derived provide the basis of a generator for the rapid design of System-on-a-Chip (SoC) cores for QR decomposition.

Parameterizable QR core

The design of a generic QR core for adaptive beamforming is presented. The work relies on an existing mapping technique that can be applied to a triangular QR array in such a way to allow the generation of a range of QR architectures. All scheduling of data inputs and retiming to include processor latency has been included within the generic representation.

Fast Moving Window Algorithm for QR and Cholesky Decompositions

This paper proposes a fast moving window algorithm for QR and Cholesky decompositions by simultaneously applying data updating and downdating. The developed procedure is based on inner products and entails a similar downdating to that of the Chambers’ approach. For adding and deleting one row of data from the original matrix, a detailed analysis shows that the proposed algorithm outperforms existing ones in terms or computational efficiency, if the number of columns exceeds 7. For a large number of columns, the proposed algorithm is numerically superior compared to the traditional sequential technique.

Uso do QR no marketing digital: a perspetiva do utilizador português

Dissertação de Mestrado apresentada ao Instituto de Contabilidade e Administração do Porto para a obtenção do grau de Mestre em Marketing Digital, sob orientação de Doutor José Freitas Santos