Generic scheduling methods for a linear QR array SoC processor
Data(s) |
01/01/2001
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Resumo |
A scheduling method for implementing a generic linear QR array processor architecture is presented. This improves on previous work. It also considerably simplifies the derivation of schedules for a folded linear system, where detailed account has to be taken of processor cell latency. The architecture and scheduling derived provide the basis of a generator for the rapid design of System-on-a-Chip (SoC) cores for QR decomposition. |
Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Liu , Z , LightBody , G , Walke , R , Hu , Y & McCanny , J 2001 , ' Generic scheduling methods for a linear QR array SoC processor ' ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings , vol 2 , pp. 1097-1100 . |
Palavras-Chave | #/dk/atira/pure/subjectarea/asjc/1700/1711 #Signal Processing #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering #/dk/atira/pure/subjectarea/asjc/3100/3102 #Acoustics and Ultrasonics |
Tipo |
article |