Statistical gear health analysis which is robust to fluctuating loads and operating speeds

Condition-based maintenance is concerned with the collection and interpretation of data to support maintenance decisions. The non-intrusive nature of vibration data enables the monitoring of enclosed systems such as gearboxes. It remains a significant challenge to analyze vibration data that are generated under fluctuating operating conditions. This is especially true for situations where relatively little prior knowledge regarding the specific gearbox is available. It is therefore investigated how an adaptive time series model, which is based on Bayesian model selection, may be used to remove the non-fault related components in the structural response of a gear assembly to obtain a residual signal which is robust to fluctuating operating conditions. A statistical framework is subsequently proposed which may be used to interpret the structure of the residual signal in order to facilitate an intuitive understanding of the condition of the gear system. The proposed methodology is investigated on both simulated and experimental data from a single stage gearbox. © 2011 Elsevier Ltd. All rights reserved.

Operating charts for the brushless doubly-fed machine (BDFM)

The Brushless Doubly-Fed Machine (BDFM) is an electrical machine that allows brushless operation in many applications where the Doubly-Fed Induction Generator (DFIG) is currently used. In recent years work on BDFM control means that the machine can now be run stably across its working range. However, little work has been done to define the working area in which BDFM can safely be operated without exceeding its material and stability limits. This paper sets out the theoretical backing for an operating chart of an ideal BDFM similar to that of the synchronous machine. It goes on to show that though the ideal chart gives the right form, non-ideal parameters (especially the finite magnetizing inductances) significantly effect the locations of the limits. Some preliminary experimental data obtained for a 225 frame size machine support the form of the chart. Finally it is shown how the operating chart can be used to chose appropriately sized converters for the BDFM. © 2009 IEEE.

Conduction bottleneck in silicon nanochain single electron transistors operating at room temperature

Single electron transistors are fabricated on single Si nanochains, synthesised by thermal evaporation of SiO solid sources. The nanochains consist of one-dimensional arrays of ~10nm Si nanocrystals, separated by SiO 2 regions. At 300 K, strong Coulomb staircases are seen in the drain-source current-voltage (I ds-V ds) characteristics, and single-electron oscillations are seen in the drain-source current-gate voltage (I ds-V ds) characteristics. From 300-20 K, a large increase in the Coulomb blockade region is observed. The characteristics are explained using singleelectron Monte Carlo simulation, where an inhomogeneous multiple tunnel junction represents a nanochain. Any reduction in capacitance at a nanocrystal well within the nanochain creates a conduction " bottleneck", suppressing current at low voltage and improving the Coulomb staircase. The single-electron charging energy at such an island can be very high, ~20k BT at 300 K. © 2012 The Japan Society of Applied Physics.

Half-bridge SIC inverter for hybrid electric vehicles: Design, development and testing at higher operating temperature

In recent years, Silicon Carbide (SiC) semiconductor devices have shown promise for high density power electronic applications, due to their electrical and thermal properties. In this paper, the performance of SiC JFETs for hybrid electric vehicle (HEV) applications is investigated at heatsink temperatures of 100 °C. The thermal runaway characteristics, maximum current density and packaging temperature limitations of the devices are considered and the efficiency implications discussed. To quantify the power density capabilities of power transistors, a novel 'expression of rating' (EoR) is proposed. A prototype single phase, half-bridge voltage source inverter using SiC JFETs is also tested and its performance at 25 °C and 100 °C investigated.